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eth: Standardize frame length control encoding to len-1 in MAC modules

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Signed-off-by: Alex Forencich <alex@alexforencich.com>
This commit is contained in:
Alex Forencich
2026-05-11 21:17:45 -07:00
parent e608e8b73e
commit 32bee1f53a
20 changed files with 125 additions and 79 deletions
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15
src/eth/rtl/taxi_axis_baser_rx_32.sv
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@@ -48,7 +48,7 @@ module taxi_axis_baser_rx_32 #
/* /*
* Configuration * Configuration
*/ */
input wire logic [15:0] cfg_rx_max_pkt_len = 16'd1518, input wire logic [15:0] cfg_rx_max_pkt_len = 16'd1518-1,
input wire logic cfg_rx_enable, input wire logic cfg_rx_enable,
/* /*
@@ -334,8 +334,14 @@ always_comb begin
frame_len_lim_cyc_next = '0; frame_len_lim_cyc_next = '0;
end end
if (frame_len_lim_cyc_reg == 2) begin if (frame_len_lim_last_reg == 0) begin
frame_len_lim_check_next = 1'b1; if (frame_len_lim_cyc_reg == 1) begin
frame_len_lim_check_next = 1'b1;
end
end else begin
if (frame_len_lim_cyc_reg == 2) begin
frame_len_lim_check_next = 1'b1;
end
end end
// address and ethertype checks // address and ethertype checks
@@ -362,7 +368,8 @@ always_comb begin
frame_oversize_next = 1'b0; frame_oversize_next = 1'b0;
frame_len_next = 16'(KEEP_W); frame_len_next = 16'(KEEP_W);
{frame_len_lim_cyc_next, frame_len_lim_last_next} = cfg_rx_max_pkt_len; frame_len_lim_cyc_next = cfg_rx_max_pkt_len[15:2];
frame_len_lim_last_next = cfg_rx_max_pkt_len[1:0] + 1;
frame_len_lim_check_next = 1'b0; frame_len_lim_check_next = 1'b0;
hdr_ptr_next = 0; hdr_ptr_next = 0;

15
src/eth/rtl/taxi_axis_baser_rx_64.sv
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@@ -49,7 +49,7 @@ module taxi_axis_baser_rx_64 #
/* /*
* Configuration * Configuration
*/ */
input wire logic [15:0] cfg_rx_max_pkt_len = 16'd1518, input wire logic [15:0] cfg_rx_max_pkt_len = 16'd1518-1,
input wire logic cfg_rx_enable, input wire logic cfg_rx_enable,
/* /*
@@ -360,8 +360,14 @@ always_comb begin
frame_len_lim_cyc_next = '0; frame_len_lim_cyc_next = '0;
end end
if (frame_len_lim_cyc_reg == 2) begin if (frame_len_lim_last_reg == 0) begin
frame_len_lim_check_next = 1'b1; if (frame_len_lim_cyc_reg == 1) begin
frame_len_lim_check_next = 1'b1;
end
end else begin
if (frame_len_lim_cyc_reg == 2) begin
frame_len_lim_check_next = 1'b1;
end
end end
// address and ethertype checks // address and ethertype checks
@@ -385,7 +391,8 @@ always_comb begin
// idle state - wait for packet // idle state - wait for packet
frame_oversize_next = 1'b0; frame_oversize_next = 1'b0;
frame_len_next = 16'(KEEP_W); frame_len_next = 16'(KEEP_W);
{frame_len_lim_cyc_next, frame_len_lim_last_next} = cfg_rx_max_pkt_len; frame_len_lim_cyc_next = cfg_rx_max_pkt_len[15:3];
frame_len_lim_last_next = cfg_rx_max_pkt_len[2:0] + 1;
frame_len_lim_check_next = 1'b0; frame_len_lim_check_next = 1'b0;
hdr_ptr_next = 0; hdr_ptr_next = 0;

4
src/eth/rtl/taxi_axis_baser_tx_32.sv
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@@ -57,7 +57,7 @@ module taxi_axis_baser_tx_32 #
/* /*
* Configuration * Configuration
*/ */
input wire logic [15:0] cfg_tx_max_pkt_len = 16'd1518, input wire logic [15:0] cfg_tx_max_pkt_len = 16'd1518-1,
input wire logic [7:0] cfg_tx_ifg = 8'd12, input wire logic [7:0] cfg_tx_ifg = 8'd12,
input wire logic cfg_tx_enable, input wire logic cfg_tx_enable,
@@ -471,7 +471,7 @@ always_comb begin
frame_min_count_next = MIN_LEN_W'(MIN_FRAME_LEN-4); frame_min_count_next = MIN_LEN_W'(MIN_FRAME_LEN-4);
hdr_ptr_next = 0; hdr_ptr_next = 0;
frame_len_next = 0; frame_len_next = 0;
{frame_len_lim_cyc_next, frame_len_lim_last_next} = cfg_tx_max_pkt_len-1; {frame_len_lim_cyc_next, frame_len_lim_last_next} = cfg_tx_max_pkt_len;
frame_len_lim_check_next = 1'b0; frame_len_lim_check_next = 1'b0;
reset_crc = 1'b1; reset_crc = 1'b1;

14
src/eth/rtl/taxi_axis_baser_tx_64.sv
View File

@@ -58,7 +58,7 @@ module taxi_axis_baser_tx_64 #
/* /*
* Configuration * Configuration
*/ */
input wire logic [15:0] cfg_tx_max_pkt_len = 16'd1518, input wire logic [15:0] cfg_tx_max_pkt_len = 16'd1518-1,
input wire logic [7:0] cfg_tx_ifg = 8'd12, input wire logic [7:0] cfg_tx_ifg = 8'd12,
input wire logic cfg_tx_enable, input wire logic cfg_tx_enable,
@@ -466,8 +466,14 @@ always_comb begin
frame_len_lim_cyc_next = '0; frame_len_lim_cyc_next = '0;
end end
if (frame_len_lim_cyc_reg == 2) begin if (frame_len_lim_last_reg[2]) begin
frame_len_lim_check_next = 1'b1; if (frame_len_lim_cyc_reg == 3) begin
frame_len_lim_check_next = 1'b1;
end
end else begin
if (frame_len_lim_cyc_reg == 2) begin
frame_len_lim_check_next = 1'b1;
end
end end
// address and ethertype checks // address and ethertype checks
@@ -500,7 +506,7 @@ always_comb begin
frame_min_count_next = MIN_LEN_W'(MIN_FRAME_LEN-4-KEEP_W); frame_min_count_next = MIN_LEN_W'(MIN_FRAME_LEN-4-KEEP_W);
hdr_ptr_next = 0; hdr_ptr_next = 0;
frame_len_next = 0; frame_len_next = 0;
{frame_len_lim_cyc_next, frame_len_lim_last_next} = cfg_tx_max_pkt_len-5; {frame_len_lim_cyc_next, frame_len_lim_last_next} = cfg_tx_max_pkt_len ^ 4;
frame_len_lim_check_next = 1'b0; frame_len_lim_check_next = 1'b0;
reset_crc = 1'b1; reset_crc = 1'b1;
s_axis_tx_tready_next = cfg_tx_enable; s_axis_tx_tready_next = cfg_tx_enable;

16
src/eth/rtl/taxi_axis_gmii_rx.sv
View File

@@ -51,7 +51,7 @@ module taxi_axis_gmii_rx #
/* /*
* Configuration * Configuration
*/ */
input wire logic [15:0] cfg_rx_max_pkt_len = 16'd1518, input wire logic [15:0] cfg_rx_max_pkt_len = 16'd1518-1,
input wire logic cfg_rx_enable, input wire logic cfg_rx_enable,
/* /*
@@ -134,6 +134,7 @@ logic is_bcast_reg = 1'b0, is_bcast_next;
logic is_8021q_reg = 1'b0, is_8021q_next; logic is_8021q_reg = 1'b0, is_8021q_next;
logic [15:0] frame_len_reg = '0, frame_len_next; logic [15:0] frame_len_reg = '0, frame_len_next;
logic [15:0] frame_len_lim_reg = '0, frame_len_lim_next; logic [15:0] frame_len_lim_reg = '0, frame_len_lim_next;
logic frame_len_lim_check_reg = '0, frame_len_lim_check_next;
logic [DATA_W-1:0] m_axis_rx_tdata_reg = '0, m_axis_rx_tdata_next; logic [DATA_W-1:0] m_axis_rx_tdata_reg = '0, m_axis_rx_tdata_next;
logic m_axis_rx_tvalid_reg = 1'b0, m_axis_rx_tvalid_next; logic m_axis_rx_tvalid_reg = 1'b0, m_axis_rx_tvalid_next;
@@ -228,6 +229,7 @@ always_comb begin
is_8021q_next = is_8021q_reg; is_8021q_next = is_8021q_reg;
frame_len_next = frame_len_reg; frame_len_next = frame_len_reg;
frame_len_lim_next = frame_len_lim_reg; frame_len_lim_next = frame_len_lim_reg;
frame_len_lim_check_next = frame_len_lim_check_reg;
m_axis_rx_tdata_next = '0; m_axis_rx_tdata_next = '0;
m_axis_rx_tvalid_next = 1'b0; m_axis_rx_tvalid_next = 1'b0;
@@ -266,6 +268,8 @@ always_comb begin
// counter for max frame length enforcement // counter for max frame length enforcement
if (frame_len_lim_reg != 0) begin if (frame_len_lim_reg != 0) begin
frame_len_lim_next = frame_len_lim_reg - 1; frame_len_lim_next = frame_len_lim_reg - 1;
end else begin
frame_len_lim_check_next = 1'b1;
end end
// address and ethertype checks // address and ethertype checks
@@ -297,6 +301,7 @@ always_comb begin
frame_error_next = 1'b0; frame_error_next = 1'b0;
frame_len_next = 1; frame_len_next = 1;
frame_len_lim_next = cfg_rx_max_pkt_len; frame_len_lim_next = cfg_rx_max_pkt_len;
frame_len_lim_check_next = 1'b0;
hdr_ptr_next = 0; hdr_ptr_next = 0;
is_mcast_next = 1'b0; is_mcast_next = 1'b0;
is_bcast_next = 1'b0; is_bcast_next = 1'b0;
@@ -372,18 +377,18 @@ always_comb begin
stat_rx_pkt_mcast_next = is_mcast_reg && !is_bcast_reg; stat_rx_pkt_mcast_next = is_mcast_reg && !is_bcast_reg;
stat_rx_pkt_bcast_next = is_bcast_reg; stat_rx_pkt_bcast_next = is_bcast_reg;
stat_rx_pkt_vlan_next = is_8021q_reg; stat_rx_pkt_vlan_next = is_8021q_reg;
stat_rx_err_oversize_next = frame_len_lim_reg == 0; stat_rx_err_oversize_next = frame_len_lim_check_reg;
stat_rx_err_framing_next = !gmii_rx_dv_d0_reg; stat_rx_err_framing_next = !gmii_rx_dv_d0_reg;
stat_rx_err_preamble_next = !pre_ok_reg; stat_rx_err_preamble_next = !pre_ok_reg;
if (frame_error_next) begin if (frame_error_next) begin
// error // error
m_axis_rx_tuser_next = 1'b1; m_axis_rx_tuser_next = 1'b1;
stat_rx_pkt_fragment_next = frame_len_reg[15:6] == 0; stat_rx_pkt_fragment_next = frame_len_reg[15:6] == 0;
stat_rx_pkt_jabber_next = frame_len_lim_reg == 0; stat_rx_pkt_jabber_next = frame_len_lim_check_reg;
stat_rx_pkt_bad_next = 1'b1; stat_rx_pkt_bad_next = 1'b1;
end else if (crc_valid) begin end else if (crc_valid) begin
// FCS good // FCS good
if (frame_len_lim_reg == 0) begin if (frame_len_lim_check_reg) begin
// too long // too long
m_axis_rx_tuser_next = 1'b1; m_axis_rx_tuser_next = 1'b1;
stat_rx_pkt_bad_next = 1'b1; stat_rx_pkt_bad_next = 1'b1;
@@ -396,7 +401,7 @@ always_comb begin
// FCS bad // FCS bad
m_axis_rx_tuser_next = 1'b1; m_axis_rx_tuser_next = 1'b1;
stat_rx_pkt_fragment_next = frame_len_reg[15:6] == 0; stat_rx_pkt_fragment_next = frame_len_reg[15:6] == 0;
stat_rx_pkt_jabber_next = frame_len_lim_reg == 0; stat_rx_pkt_jabber_next = frame_len_lim_check_reg;
stat_rx_pkt_bad_next = 1'b1; stat_rx_pkt_bad_next = 1'b1;
stat_rx_err_bad_fcs_next = 1'b1; stat_rx_err_bad_fcs_next = 1'b1;
end end
@@ -426,6 +431,7 @@ always_ff @(posedge clk) begin
is_8021q_reg <= is_8021q_next; is_8021q_reg <= is_8021q_next;
frame_len_reg <= frame_len_next; frame_len_reg <= frame_len_next;
frame_len_lim_reg <= frame_len_lim_next; frame_len_lim_reg <= frame_len_lim_next;
frame_len_lim_check_reg <= frame_len_lim_check_next;
m_axis_rx_tdata_reg <= m_axis_rx_tdata_next; m_axis_rx_tdata_reg <= m_axis_rx_tdata_next;
m_axis_rx_tvalid_reg <= m_axis_rx_tvalid_next; m_axis_rx_tvalid_reg <= m_axis_rx_tvalid_next;

6
src/eth/rtl/taxi_axis_gmii_tx.sv
View File

@@ -55,7 +55,7 @@ module taxi_axis_gmii_tx #
/* /*
* Configuration * Configuration
*/ */
input wire logic [15:0] cfg_tx_max_pkt_len = 16'd1518, input wire logic [15:0] cfg_tx_max_pkt_len = 16'd1518-1,
input wire logic [7:0] cfg_tx_ifg = 8'd12, input wire logic [7:0] cfg_tx_ifg = 8'd12,
input wire logic cfg_tx_enable, input wire logic cfg_tx_enable,
@@ -413,7 +413,8 @@ always_comb begin
if (!s_axis_tx.tvalid || s_axis_tx.tlast || frame_len_lim_reg < 6) begin if (!s_axis_tx.tvalid || s_axis_tx.tlast || frame_len_lim_reg < 6) begin
s_axis_tx_tready_next = frame_next; // drop frame s_axis_tx_tready_next = frame_next; // drop frame
frame_error_next = !s_axis_tx.tvalid || s_axis_tx.tuser[0] || frame_len_lim_reg < 6; stat_tx_err_oversize_next = !s_axis_tx.tlast && frame_len_lim_reg < 6;
frame_error_next = !s_axis_tx.tvalid || s_axis_tx.tuser[0] || stat_tx_err_oversize_next;
stat_tx_err_user_next = s_axis_tx.tuser[0]; stat_tx_err_user_next = s_axis_tx.tuser[0];
stat_tx_err_underflow_next = !s_axis_tx.tvalid; stat_tx_err_underflow_next = !s_axis_tx.tvalid;
@@ -494,7 +495,6 @@ always_comb begin
stat_tx_pkt_mcast_next = is_mcast_reg && !is_bcast_reg; stat_tx_pkt_mcast_next = is_mcast_reg && !is_bcast_reg;
stat_tx_pkt_bcast_next = is_bcast_reg; stat_tx_pkt_bcast_next = is_bcast_reg;
stat_tx_pkt_vlan_next = is_8021q_reg; stat_tx_pkt_vlan_next = is_8021q_reg;
stat_tx_err_oversize_next = frame_len_lim_reg == 0;
state_next = STATE_IFG; state_next = STATE_IFG;
end end
end end

15
src/eth/rtl/taxi_axis_xgmii_rx_32.sv
View File

@@ -47,7 +47,7 @@ module taxi_axis_xgmii_rx_32 #
/* /*
* Configuration * Configuration
*/ */
input wire logic [15:0] cfg_rx_max_pkt_len = 16'd1518, input wire logic [15:0] cfg_rx_max_pkt_len = 16'd1518-1,
input wire logic cfg_rx_enable, input wire logic cfg_rx_enable,
/* /*
@@ -300,8 +300,14 @@ always_comb begin
frame_len_lim_cyc_next = '0; frame_len_lim_cyc_next = '0;
end end
if (frame_len_lim_cyc_reg == 2) begin if (frame_len_lim_last_reg == 0) begin
frame_len_lim_check_next = 1'b1; if (frame_len_lim_cyc_reg == 1) begin
frame_len_lim_check_next = 1'b1;
end
end else begin
if (frame_len_lim_cyc_reg == 2) begin
frame_len_lim_check_next = 1'b1;
end
end end
// address and ethertype checks // address and ethertype checks
@@ -326,7 +332,8 @@ always_comb begin
// idle state - wait for packet // idle state - wait for packet
frame_oversize_next = 1'b0; frame_oversize_next = 1'b0;
frame_len_next = 16'(CTRL_W); frame_len_next = 16'(CTRL_W);
{frame_len_lim_cyc_next, frame_len_lim_last_next} = cfg_rx_max_pkt_len; frame_len_lim_cyc_next = cfg_rx_max_pkt_len[15:2];
frame_len_lim_last_next = cfg_rx_max_pkt_len[1:0] + 1;
frame_len_lim_check_next = 1'b0; frame_len_lim_check_next = 1'b0;
hdr_ptr_next = 0; hdr_ptr_next = 0;

15
src/eth/rtl/taxi_axis_xgmii_rx_64.sv
View File

@@ -48,7 +48,7 @@ module taxi_axis_xgmii_rx_64 #
/* /*
* Configuration * Configuration
*/ */
input wire logic [15:0] cfg_rx_max_pkt_len = 16'd1518, input wire logic [15:0] cfg_rx_max_pkt_len = 16'd1518-1,
input wire logic cfg_rx_enable, input wire logic cfg_rx_enable,
/* /*
@@ -311,8 +311,14 @@ always_comb begin
frame_len_lim_cyc_next = '0; frame_len_lim_cyc_next = '0;
end end
if (frame_len_lim_cyc_reg == 2) begin if (frame_len_lim_last_reg == 0) begin
frame_len_lim_check_next = 1'b1; if (frame_len_lim_cyc_reg == 1) begin
frame_len_lim_check_next = 1'b1;
end
end else begin
if (frame_len_lim_cyc_reg == 2) begin
frame_len_lim_check_next = 1'b1;
end
end end
// address and ethertype checks // address and ethertype checks
@@ -336,7 +342,8 @@ always_comb begin
// idle state - wait for packet // idle state - wait for packet
frame_oversize_next = 1'b0; frame_oversize_next = 1'b0;
frame_len_next = 16'(CTRL_W); frame_len_next = 16'(CTRL_W);
{frame_len_lim_cyc_next, frame_len_lim_last_next} = cfg_rx_max_pkt_len; frame_len_lim_cyc_next = cfg_rx_max_pkt_len[15:3];
frame_len_lim_last_next = cfg_rx_max_pkt_len[2:0] + 1;
frame_len_lim_check_next = 1'b0; frame_len_lim_check_next = 1'b0;
hdr_ptr_next = 0; hdr_ptr_next = 0;

4
src/eth/rtl/taxi_axis_xgmii_tx_32.sv
View File

@@ -56,7 +56,7 @@ module taxi_axis_xgmii_tx_32 #
/* /*
* Configuration * Configuration
*/ */
input wire logic [15:0] cfg_tx_max_pkt_len = 16'd1518, input wire logic [15:0] cfg_tx_max_pkt_len = 16'd1518-1,
input wire logic [7:0] cfg_tx_ifg = 8'd12, input wire logic [7:0] cfg_tx_ifg = 8'd12,
input wire logic cfg_tx_enable, input wire logic cfg_tx_enable,
@@ -427,7 +427,7 @@ always_comb begin
frame_min_count_next = MIN_LEN_W'(MIN_FRAME_LEN-4); frame_min_count_next = MIN_LEN_W'(MIN_FRAME_LEN-4);
hdr_ptr_next = 0; hdr_ptr_next = 0;
frame_len_next = 0; frame_len_next = 0;
{frame_len_lim_cyc_next, frame_len_lim_last_next} = cfg_tx_max_pkt_len-1; {frame_len_lim_cyc_next, frame_len_lim_last_next} = cfg_tx_max_pkt_len;
frame_len_lim_check_next = 1'b0; frame_len_lim_check_next = 1'b0;
reset_crc = 1'b1; reset_crc = 1'b1;

14
src/eth/rtl/taxi_axis_xgmii_tx_64.sv
View File

@@ -57,7 +57,7 @@ module taxi_axis_xgmii_tx_64 #
/* /*
* Configuration * Configuration
*/ */
input wire logic [15:0] cfg_tx_max_pkt_len = 16'd1518, input wire logic [15:0] cfg_tx_max_pkt_len = 16'd1518-1,
input wire logic [7:0] cfg_tx_ifg = 8'd12, input wire logic [7:0] cfg_tx_ifg = 8'd12,
input wire logic cfg_tx_enable, input wire logic cfg_tx_enable,
@@ -416,8 +416,14 @@ always_comb begin
frame_len_lim_cyc_next = '0; frame_len_lim_cyc_next = '0;
end end
if (frame_len_lim_cyc_reg == 2) begin if (frame_len_lim_last_reg[2]) begin
frame_len_lim_check_next = 1'b1; if (frame_len_lim_cyc_reg == 3) begin
frame_len_lim_check_next = 1'b1;
end
end else begin
if (frame_len_lim_cyc_reg == 2) begin
frame_len_lim_check_next = 1'b1;
end
end end
// address and ethertype checks // address and ethertype checks
@@ -450,7 +456,7 @@ always_comb begin
frame_min_count_next = MIN_LEN_W'(MIN_FRAME_LEN-4-CTRL_W); frame_min_count_next = MIN_LEN_W'(MIN_FRAME_LEN-4-CTRL_W);
hdr_ptr_next = 0; hdr_ptr_next = 0;
frame_len_next = 0; frame_len_next = 0;
{frame_len_lim_cyc_next, frame_len_lim_last_next} = cfg_tx_max_pkt_len-5; {frame_len_lim_cyc_next, frame_len_lim_last_next} = cfg_tx_max_pkt_len ^ 4;
frame_len_lim_check_next = 1'b0; frame_len_lim_check_next = 1'b0;
reset_crc = 1'b1; reset_crc = 1'b1;
s_axis_tx_tready_next = cfg_tx_enable; s_axis_tx_tready_next = cfg_tx_enable;

6
src/eth/tb/taxi_axis_baser_rx_32/test_taxi_axis_baser_rx_32.py
View File

@@ -115,7 +115,7 @@ async def run_test(dut, gbx_cfg=None, payload_lengths=None, payload_data=None, i
tb = TB(dut, gbx_cfg) tb = TB(dut, gbx_cfg)
tb.source.ifg = ifg tb.source.ifg = ifg
tb.dut.cfg_rx_max_pkt_len.value = 9218 tb.dut.cfg_rx_max_pkt_len.value = 9218-1
tb.dut.cfg_rx_enable.value = 1 tb.dut.cfg_rx_enable.value = 1
await tb.reset() await tb.reset()
@@ -185,7 +185,7 @@ async def run_test_oversize(dut, gbx_cfg=None, ifg=12):
tb = TB(dut, gbx_cfg) tb = TB(dut, gbx_cfg)
tb.source.ifg = ifg tb.source.ifg = ifg
tb.dut.cfg_rx_max_pkt_len.value = 1518 tb.dut.cfg_rx_max_pkt_len.value = 1518-1
tb.dut.cfg_rx_enable.value = 1 tb.dut.cfg_rx_enable.value = 1
await tb.reset() await tb.reset()
@@ -205,7 +205,7 @@ async def run_test_oversize(dut, gbx_cfg=None, ifg=12):
tb.log.info("max len %d (without FCS), test len %d (without FCS)", max_len, test_pkt_len) tb.log.info("max len %d (without FCS), test len %d (without FCS)", max_len, test_pkt_len)
tb.dut.cfg_rx_max_pkt_len.value = max_len+4 tb.dut.cfg_rx_max_pkt_len.value = max_len+4-1
test_data_1 = bytes(x for x in range(60)) test_data_1 = bytes(x for x in range(60))
test_data_2 = bytes(x for x in range(test_pkt_len)) test_data_2 = bytes(x for x in range(test_pkt_len))

6
src/eth/tb/taxi_axis_baser_rx_64/test_taxi_axis_baser_rx_64.py
View File

@@ -115,7 +115,7 @@ async def run_test(dut, gbx_cfg=None, payload_lengths=None, payload_data=None, i
tb = TB(dut, gbx_cfg) tb = TB(dut, gbx_cfg)
tb.source.ifg = ifg tb.source.ifg = ifg
tb.dut.cfg_rx_max_pkt_len.value = 9218 tb.dut.cfg_rx_max_pkt_len.value = 9218-1
tb.dut.cfg_rx_enable.value = 1 tb.dut.cfg_rx_enable.value = 1
await tb.reset() await tb.reset()
@@ -185,7 +185,7 @@ async def run_test_oversize(dut, gbx_cfg=None, ifg=12):
tb = TB(dut, gbx_cfg) tb = TB(dut, gbx_cfg)
tb.source.ifg = ifg tb.source.ifg = ifg
tb.dut.cfg_rx_max_pkt_len.value = 1518 tb.dut.cfg_rx_max_pkt_len.value = 1518-1
tb.dut.cfg_rx_enable.value = 1 tb.dut.cfg_rx_enable.value = 1
await tb.reset() await tb.reset()
@@ -205,7 +205,7 @@ async def run_test_oversize(dut, gbx_cfg=None, ifg=12):
tb.log.info("max len %d (without FCS), test len %d (without FCS)", max_len, test_pkt_len) tb.log.info("max len %d (without FCS), test len %d (without FCS)", max_len, test_pkt_len)
tb.dut.cfg_rx_max_pkt_len.value = max_len+4 tb.dut.cfg_rx_max_pkt_len.value = max_len+4-1
test_data_1 = bytes(x for x in range(60)) test_data_1 = bytes(x for x in range(60))
test_data_2 = bytes(x for x in range(test_pkt_len)) test_data_2 = bytes(x for x in range(test_pkt_len))

10
src/eth/tb/taxi_axis_baser_tx_32/test_taxi_axis_baser_tx_32.py
View File

@@ -115,7 +115,7 @@ async def run_test(dut, gbx_cfg=None, payload_lengths=None, payload_data=None, i
tb = TB(dut, gbx_cfg) tb = TB(dut, gbx_cfg)
tb.dut.cfg_tx_max_pkt_len.value = 9218 tb.dut.cfg_tx_max_pkt_len.value = 9218-1
tb.dut.cfg_tx_ifg.value = ifg tb.dut.cfg_tx_ifg.value = ifg
await tb.reset() await tb.reset()
@@ -182,7 +182,7 @@ async def run_test_underrun(dut, gbx_cfg=None, ifg=12):
tb = TB(dut, gbx_cfg) tb = TB(dut, gbx_cfg)
tb.dut.cfg_tx_max_pkt_len.value = 9218 tb.dut.cfg_tx_max_pkt_len.value = 9218-1
tb.dut.cfg_tx_ifg.value = ifg tb.dut.cfg_tx_ifg.value = ifg
await tb.reset() await tb.reset()
@@ -244,7 +244,7 @@ async def run_test_error(dut, gbx_cfg=None, ifg=12):
tb = TB(dut, gbx_cfg) tb = TB(dut, gbx_cfg)
tb.dut.cfg_tx_max_pkt_len.value = 9218 tb.dut.cfg_tx_max_pkt_len.value = 9218-1
tb.dut.cfg_tx_ifg.value = ifg tb.dut.cfg_tx_ifg.value = ifg
await tb.reset() await tb.reset()
@@ -298,7 +298,7 @@ async def run_test_oversize(dut, gbx_cfg=None, ifg=12):
tb = TB(dut, gbx_cfg) tb = TB(dut, gbx_cfg)
tb.dut.cfg_tx_max_pkt_len.value = 1518 tb.dut.cfg_tx_max_pkt_len.value = 1518-1
tb.dut.cfg_tx_ifg.value = ifg tb.dut.cfg_tx_ifg.value = ifg
await tb.reset() await tb.reset()
@@ -323,7 +323,7 @@ async def run_test_oversize(dut, gbx_cfg=None, ifg=12):
tb.log.info("max len %d (without FCS), test len %d (without FCS)", max_len, test_pkt_len) tb.log.info("max len %d (without FCS), test len %d (without FCS)", max_len, test_pkt_len)
tb.dut.cfg_tx_max_pkt_len.value = max_len+4 tb.dut.cfg_tx_max_pkt_len.value = max_len+4-1
test_data_1 = bytes(x for x in range(60)) test_data_1 = bytes(x for x in range(60))
test_data_2 = bytes(x for x in range(test_pkt_len)) test_data_2 = bytes(x for x in range(test_pkt_len))

12
src/eth/tb/taxi_axis_baser_tx_64/test_taxi_axis_baser_tx_64.py
View File

@@ -115,7 +115,7 @@ async def run_test(dut, gbx_cfg=None, payload_lengths=None, payload_data=None, i
tb = TB(dut, gbx_cfg) tb = TB(dut, gbx_cfg)
tb.dut.cfg_tx_max_pkt_len.value = 9218 tb.dut.cfg_tx_max_pkt_len.value = 9218-1
tb.dut.cfg_tx_ifg.value = ifg tb.dut.cfg_tx_ifg.value = ifg
await tb.reset() await tb.reset()
@@ -186,7 +186,7 @@ async def run_test_alignment(dut, gbx_cfg=None, payload_data=None, ifg=12):
byte_width = tb.source.width // 8 byte_width = tb.source.width // 8
tb.dut.cfg_tx_max_pkt_len.value = 9218 tb.dut.cfg_tx_max_pkt_len.value = 9218-1
tb.dut.cfg_tx_ifg.value = ifg tb.dut.cfg_tx_ifg.value = ifg
await tb.reset() await tb.reset()
@@ -295,7 +295,7 @@ async def run_test_underrun(dut, gbx_cfg=None, ifg=12):
tb = TB(dut, gbx_cfg) tb = TB(dut, gbx_cfg)
tb.dut.cfg_tx_max_pkt_len.value = 9218 tb.dut.cfg_tx_max_pkt_len.value = 9218-1
tb.dut.cfg_tx_ifg.value = ifg tb.dut.cfg_tx_ifg.value = ifg
await tb.reset() await tb.reset()
@@ -357,7 +357,7 @@ async def run_test_error(dut, gbx_cfg=None, ifg=12):
tb = TB(dut, gbx_cfg) tb = TB(dut, gbx_cfg)
tb.dut.cfg_tx_max_pkt_len.value = 9218 tb.dut.cfg_tx_max_pkt_len.value = 9218-1
tb.dut.cfg_tx_ifg.value = ifg tb.dut.cfg_tx_ifg.value = ifg
await tb.reset() await tb.reset()
@@ -411,7 +411,7 @@ async def run_test_oversize(dut, gbx_cfg=None, ifg=12):
tb = TB(dut, gbx_cfg) tb = TB(dut, gbx_cfg)
tb.dut.cfg_tx_max_pkt_len.value = 1518 tb.dut.cfg_tx_max_pkt_len.value = 1518-1
tb.dut.cfg_tx_ifg.value = ifg tb.dut.cfg_tx_ifg.value = ifg
await tb.reset() await tb.reset()
@@ -436,7 +436,7 @@ async def run_test_oversize(dut, gbx_cfg=None, ifg=12):
tb.log.info("max len %d (without FCS), test len %d (without FCS)", max_len, test_pkt_len) tb.log.info("max len %d (without FCS), test len %d (without FCS)", max_len, test_pkt_len)
tb.dut.cfg_tx_max_pkt_len.value = max_len+4 tb.dut.cfg_tx_max_pkt_len.value = max_len+4-1
test_data_1 = bytes(x for x in range(60)) test_data_1 = bytes(x for x in range(60))
test_data_2 = bytes(x for x in range(test_pkt_len)) test_data_2 = bytes(x for x in range(test_pkt_len))

6
src/eth/tb/taxi_axis_gmii_rx/test_taxi_axis_gmii_rx.py
View File

@@ -116,7 +116,7 @@ async def run_test(dut, payload_lengths=None, payload_data=None, ifg=12, enable_
tb.source.ifg = ifg tb.source.ifg = ifg
tb.dut.mii_select.value = mii_sel tb.dut.mii_select.value = mii_sel
tb.dut.cfg_rx_max_pkt_len.value = 9218 tb.dut.cfg_rx_max_pkt_len.value = 9218-1
tb.dut.cfg_rx_enable.value = 1 tb.dut.cfg_rx_enable.value = 1
if enable_gen is not None: if enable_gen is not None:
@@ -186,7 +186,7 @@ async def run_test_oversize(dut, ifg=12, enable_gen=None, mii_sel=False):
tb.source.ifg = ifg tb.source.ifg = ifg
tb.dut.mii_select.value = mii_sel tb.dut.mii_select.value = mii_sel
tb.dut.cfg_rx_max_pkt_len.value = 1518 tb.dut.cfg_rx_max_pkt_len.value = 1518-1
tb.dut.cfg_rx_enable.value = 1 tb.dut.cfg_rx_enable.value = 1
if enable_gen is not None: if enable_gen is not None:
@@ -209,7 +209,7 @@ async def run_test_oversize(dut, ifg=12, enable_gen=None, mii_sel=False):
tb.log.info("max len %d (without FCS), test len %d (without FCS)", max_len, test_pkt_len) tb.log.info("max len %d (without FCS), test len %d (without FCS)", max_len, test_pkt_len)
tb.dut.cfg_rx_max_pkt_len.value = max_len+4 tb.dut.cfg_rx_max_pkt_len.value = max_len+4-1
test_data_1 = bytes(x for x in range(60)) test_data_1 = bytes(x for x in range(60))
test_data_2 = bytes(x for x in range(test_pkt_len)) test_data_2 = bytes(x for x in range(test_pkt_len))

10
src/eth/tb/taxi_axis_gmii_tx/test_taxi_axis_gmii_tx.py
View File

@@ -112,7 +112,7 @@ async def run_test(dut, payload_lengths=None, payload_data=None, ifg=12, enable_
tb = TB(dut) tb = TB(dut)
tb.dut.cfg_tx_max_pkt_len.value = 9218 tb.dut.cfg_tx_max_pkt_len.value = 9218-1
tb.dut.cfg_tx_ifg.value = ifg tb.dut.cfg_tx_ifg.value = ifg
tb.dut.cfg_tx_enable.value = 1 tb.dut.cfg_tx_enable.value = 1
tb.dut.mii_select.value = mii_sel tb.dut.mii_select.value = mii_sel
@@ -175,7 +175,7 @@ async def run_test_underrun(dut, ifg=12, enable_gen=None, mii_sel=False):
tb = TB(dut) tb = TB(dut)
tb.dut.cfg_tx_max_pkt_len.value = 9218 tb.dut.cfg_tx_max_pkt_len.value = 9218-1
tb.dut.cfg_tx_ifg.value = ifg tb.dut.cfg_tx_ifg.value = ifg
tb.dut.cfg_tx_enable.value = 1 tb.dut.cfg_tx_enable.value = 1
tb.dut.mii_select.value = mii_sel tb.dut.mii_select.value = mii_sel
@@ -243,7 +243,7 @@ async def run_test_error(dut, ifg=12, enable_gen=None, mii_sel=False):
tb = TB(dut) tb = TB(dut)
tb.dut.cfg_tx_max_pkt_len.value = 9218 tb.dut.cfg_tx_max_pkt_len.value = 9218-1
tb.dut.cfg_tx_ifg.value = ifg tb.dut.cfg_tx_ifg.value = ifg
tb.dut.cfg_tx_enable.value = 1 tb.dut.cfg_tx_enable.value = 1
tb.dut.mii_select.value = mii_sel tb.dut.mii_select.value = mii_sel
@@ -297,7 +297,7 @@ async def run_test_oversize(dut, ifg=12, enable_gen=None, mii_sel=False):
tb = TB(dut) tb = TB(dut)
tb.dut.cfg_tx_max_pkt_len.value = 1518 tb.dut.cfg_tx_max_pkt_len.value = 1518-1
tb.dut.cfg_tx_ifg.value = ifg tb.dut.cfg_tx_ifg.value = ifg
tb.dut.cfg_tx_enable.value = 1 tb.dut.cfg_tx_enable.value = 1
tb.dut.mii_select.value = mii_sel tb.dut.mii_select.value = mii_sel
@@ -322,7 +322,7 @@ async def run_test_oversize(dut, ifg=12, enable_gen=None, mii_sel=False):
tb.log.info("max len %d (without FCS), test len %d (without FCS)", max_len, test_pkt_len) tb.log.info("max len %d (without FCS), test len %d (without FCS)", max_len, test_pkt_len)
tb.dut.cfg_tx_max_pkt_len.value = max_len+4 tb.dut.cfg_tx_max_pkt_len.value = max_len+4-1
test_data_1 = bytes(x for x in range(60)) test_data_1 = bytes(x for x in range(60))
test_data_2 = bytes(x for x in range(test_pkt_len)) test_data_2 = bytes(x for x in range(test_pkt_len))

6
src/eth/tb/taxi_axis_xgmii_rx_32/test_taxi_axis_xgmii_rx_32.py
View File

@@ -93,7 +93,7 @@ async def run_test(dut, payload_lengths=None, payload_data=None, ifg=12):
tb = TB(dut) tb = TB(dut)
tb.source.ifg = ifg tb.source.ifg = ifg
tb.dut.cfg_rx_max_pkt_len.value = 9218 tb.dut.cfg_rx_max_pkt_len.value = 9218-1
tb.dut.cfg_rx_enable.value = 1 tb.dut.cfg_rx_enable.value = 1
await tb.reset() await tb.reset()
@@ -159,7 +159,7 @@ async def run_test_oversize(dut, ifg=12):
tb = TB(dut) tb = TB(dut)
tb.source.ifg = ifg tb.source.ifg = ifg
tb.dut.cfg_rx_max_pkt_len.value = 1518 tb.dut.cfg_rx_max_pkt_len.value = 1518-1
tb.dut.cfg_rx_enable.value = 1 tb.dut.cfg_rx_enable.value = 1
await tb.reset() await tb.reset()
@@ -179,7 +179,7 @@ async def run_test_oversize(dut, ifg=12):
tb.log.info("max len %d (without FCS), test len %d (without FCS)", max_len, test_pkt_len) tb.log.info("max len %d (without FCS), test len %d (without FCS)", max_len, test_pkt_len)
tb.dut.cfg_rx_max_pkt_len.value = max_len+4 tb.dut.cfg_rx_max_pkt_len.value = max_len+4-1
test_data_1 = bytes(x for x in range(60)) test_data_1 = bytes(x for x in range(60))
test_data_2 = bytes(x for x in range(test_pkt_len)) test_data_2 = bytes(x for x in range(test_pkt_len))

6
src/eth/tb/taxi_axis_xgmii_rx_64/test_taxi_axis_xgmii_rx_64.py
View File

@@ -92,7 +92,7 @@ async def run_test(dut, payload_lengths=None, payload_data=None, ifg=12):
tb = TB(dut) tb = TB(dut)
tb.source.ifg = ifg tb.source.ifg = ifg
tb.dut.cfg_rx_max_pkt_len.value = 9218 tb.dut.cfg_rx_max_pkt_len.value = 9218-1
tb.dut.cfg_rx_enable.value = 1 tb.dut.cfg_rx_enable.value = 1
await tb.reset() await tb.reset()
@@ -161,7 +161,7 @@ async def run_test_oversize(dut, ifg=12):
tb = TB(dut) tb = TB(dut)
tb.source.ifg = ifg tb.source.ifg = ifg
tb.dut.cfg_rx_max_pkt_len.value = 1518 tb.dut.cfg_rx_max_pkt_len.value = 1518-1
tb.dut.cfg_rx_enable.value = 1 tb.dut.cfg_rx_enable.value = 1
await tb.reset() await tb.reset()
@@ -181,7 +181,7 @@ async def run_test_oversize(dut, ifg=12):
tb.log.info("max len %d (with FCS), test len %d (without FCS)", max_len, test_pkt_len) tb.log.info("max len %d (with FCS), test len %d (without FCS)", max_len, test_pkt_len)
tb.dut.cfg_rx_max_pkt_len.value = max_len+4 tb.dut.cfg_rx_max_pkt_len.value = max_len+4-1
test_data_1 = bytes(x for x in range(60)) test_data_1 = bytes(x for x in range(60))
test_data_2 = bytes(x for x in range(test_pkt_len)) test_data_2 = bytes(x for x in range(test_pkt_len))

12
src/eth/tb/taxi_axis_xgmii_tx_32/test_taxi_axis_xgmii_tx_32.py
View File

@@ -89,7 +89,7 @@ async def run_test(dut, payload_lengths=None, payload_data=None, ifg=12):
tb = TB(dut) tb = TB(dut)
tb.dut.cfg_tx_max_pkt_len.value = 9218 tb.dut.cfg_tx_max_pkt_len.value = 9218-1
tb.dut.cfg_tx_ifg.value = ifg tb.dut.cfg_tx_ifg.value = ifg
tb.dut.cfg_tx_enable.value = 1 tb.dut.cfg_tx_enable.value = 1
@@ -152,7 +152,7 @@ async def run_test_alignment(dut, payload_data=None, ifg=12):
byte_width = tb.source.width // 8 byte_width = tb.source.width // 8
tb.dut.cfg_tx_max_pkt_len.value = 9218 tb.dut.cfg_tx_max_pkt_len.value = 9218-1
tb.dut.cfg_tx_ifg.value = ifg tb.dut.cfg_tx_ifg.value = ifg
tb.dut.cfg_tx_enable.value = 1 tb.dut.cfg_tx_enable.value = 1
@@ -253,7 +253,7 @@ async def run_test_underrun(dut, ifg=12):
tb = TB(dut) tb = TB(dut)
tb.dut.cfg_tx_max_pkt_len.value = 9218 tb.dut.cfg_tx_max_pkt_len.value = 9218-1
tb.dut.cfg_tx_ifg.value = ifg tb.dut.cfg_tx_ifg.value = ifg
tb.dut.cfg_tx_enable.value = 1 tb.dut.cfg_tx_enable.value = 1
@@ -312,7 +312,7 @@ async def run_test_error(dut, ifg=12):
tb = TB(dut) tb = TB(dut)
tb.dut.cfg_tx_max_pkt_len.value = 9218 tb.dut.cfg_tx_max_pkt_len.value = 9218-1
tb.dut.cfg_tx_ifg.value = ifg tb.dut.cfg_tx_ifg.value = ifg
tb.dut.cfg_tx_enable.value = 1 tb.dut.cfg_tx_enable.value = 1
@@ -363,7 +363,7 @@ async def run_test_oversize(dut, ifg=12):
tb = TB(dut) tb = TB(dut)
tb.dut.cfg_tx_max_pkt_len.value = 1518 tb.dut.cfg_tx_max_pkt_len.value = 1518-1
tb.dut.cfg_tx_ifg.value = ifg tb.dut.cfg_tx_ifg.value = ifg
tb.dut.cfg_tx_enable.value = 1 tb.dut.cfg_tx_enable.value = 1
@@ -384,7 +384,7 @@ async def run_test_oversize(dut, ifg=12):
tb.log.info("max len %d (without FCS), test len %d (without FCS)", max_len, test_pkt_len) tb.log.info("max len %d (without FCS), test len %d (without FCS)", max_len, test_pkt_len)
tb.dut.cfg_tx_max_pkt_len.value = max_len+4 tb.dut.cfg_tx_max_pkt_len.value = max_len+4-1
test_data_1 = bytes(x for x in range(60)) test_data_1 = bytes(x for x in range(60))
test_data_2 = bytes(x for x in range(test_pkt_len)) test_data_2 = bytes(x for x in range(test_pkt_len))

12
src/eth/tb/taxi_axis_xgmii_tx_64/test_taxi_axis_xgmii_tx_64.py
View File

@@ -88,7 +88,7 @@ async def run_test(dut, payload_lengths=None, payload_data=None, ifg=12):
tb = TB(dut) tb = TB(dut)
tb.dut.cfg_tx_max_pkt_len.value = 9218 tb.dut.cfg_tx_max_pkt_len.value = 9218-1
tb.dut.cfg_tx_ifg.value = ifg tb.dut.cfg_tx_ifg.value = ifg
tb.dut.cfg_tx_enable.value = 1 tb.dut.cfg_tx_enable.value = 1
@@ -154,7 +154,7 @@ async def run_test_alignment(dut, payload_data=None, ifg=12):
byte_width = tb.source.width // 8 byte_width = tb.source.width // 8
tb.dut.cfg_tx_max_pkt_len.value = 9218 tb.dut.cfg_tx_max_pkt_len.value = 9218-1
tb.dut.cfg_tx_ifg.value = ifg tb.dut.cfg_tx_ifg.value = ifg
tb.dut.cfg_tx_enable.value = 1 tb.dut.cfg_tx_enable.value = 1
@@ -258,7 +258,7 @@ async def run_test_underrun(dut, ifg=12):
tb = TB(dut) tb = TB(dut)
tb.dut.cfg_tx_max_pkt_len.value = 9218 tb.dut.cfg_tx_max_pkt_len.value = 9218-1
tb.dut.cfg_tx_ifg.value = ifg tb.dut.cfg_tx_ifg.value = ifg
tb.dut.cfg_tx_enable.value = 1 tb.dut.cfg_tx_enable.value = 1
@@ -316,7 +316,7 @@ async def run_test_error(dut, ifg=12):
tb = TB(dut) tb = TB(dut)
tb.dut.cfg_tx_max_pkt_len.value = 9218 tb.dut.cfg_tx_max_pkt_len.value = 9218-1
tb.dut.cfg_tx_ifg.value = ifg tb.dut.cfg_tx_ifg.value = ifg
tb.dut.cfg_tx_enable.value = 1 tb.dut.cfg_tx_enable.value = 1
@@ -366,7 +366,7 @@ async def run_test_oversize(dut, ifg=12):
tb = TB(dut) tb = TB(dut)
tb.dut.cfg_tx_max_pkt_len.value = 1518 tb.dut.cfg_tx_max_pkt_len.value = 1518-1
tb.dut.cfg_tx_ifg.value = ifg tb.dut.cfg_tx_ifg.value = ifg
tb.dut.cfg_tx_enable.value = 1 tb.dut.cfg_tx_enable.value = 1
@@ -387,7 +387,7 @@ async def run_test_oversize(dut, ifg=12):
tb.log.info("max len %d (without FCS), test len %d (without FCS)", max_len, test_pkt_len) tb.log.info("max len %d (without FCS), test len %d (without FCS)", max_len, test_pkt_len)
tb.dut.cfg_tx_max_pkt_len.value = max_len+4 tb.dut.cfg_tx_max_pkt_len.value = max_len+4-1
test_data_1 = bytes(x for x in range(60)) test_data_1 = bytes(x for x in range(60))
test_data_2 = bytes(x for x in range(test_pkt_len)) test_data_2 = bytes(x for x in range(test_pkt_len))