From 33495618104cdd98b60d4dc4947f607745f2a5bf Mon Sep 17 00:00:00 2001 From: Alex Forencich Date: Fri, 13 Jun 2025 16:45:00 -0700 Subject: [PATCH] eth: Remove extraneous defaults Signed-off-by: Alex Forencich --- src/eth/rtl/taxi_eth_mac_10g.sv | 2 +- src/eth/rtl/taxi_eth_mac_10g_fifo.sv | 2 +- src/eth/rtl/taxi_eth_phy_10g.sv | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/src/eth/rtl/taxi_eth_mac_10g.sv b/src/eth/rtl/taxi_eth_mac_10g.sv index e2b4dab..28a9504 100644 --- a/src/eth/rtl/taxi_eth_mac_10g.sv +++ b/src/eth/rtl/taxi_eth_mac_10g.sv @@ -63,7 +63,7 @@ module taxi_eth_mac_10g # input wire logic xgmii_rx_valid = 1'b1, output wire logic [DATA_W-1:0] xgmii_txd, output wire logic [CTRL_W-1:0] xgmii_txc, - output wire logic xgmii_tx_valid = 1'b1, + output wire logic xgmii_tx_valid, input wire logic [GBX_CNT-1:0] tx_gbx_req_sync = '0, input wire logic tx_gbx_req_stall = 1'b0, output wire logic [GBX_CNT-1:0] tx_gbx_sync, diff --git a/src/eth/rtl/taxi_eth_mac_10g_fifo.sv b/src/eth/rtl/taxi_eth_mac_10g_fifo.sv index f2a1562..9a17a59 100644 --- a/src/eth/rtl/taxi_eth_mac_10g_fifo.sv +++ b/src/eth/rtl/taxi_eth_mac_10g_fifo.sv @@ -77,7 +77,7 @@ module taxi_eth_mac_10g_fifo # input wire logic xgmii_rx_valid = 1'b1, output wire logic [DATA_W-1:0] xgmii_txd, output wire logic [CTRL_W-1:0] xgmii_txc, - output wire logic xgmii_tx_valid = 1'b1, + output wire logic xgmii_tx_valid, input wire logic [GBX_CNT-1:0] tx_gbx_req_sync = '0, input wire logic tx_gbx_req_stall = 1'b0, output wire logic [GBX_CNT-1:0] tx_gbx_sync, diff --git a/src/eth/rtl/taxi_eth_phy_10g.sv b/src/eth/rtl/taxi_eth_phy_10g.sv index 1616b4a..3267406 100644 --- a/src/eth/rtl/taxi_eth_phy_10g.sv +++ b/src/eth/rtl/taxi_eth_phy_10g.sv @@ -45,7 +45,7 @@ module taxi_eth_phy_10g # input wire logic xgmii_tx_valid = 1'b1, output wire logic [DATA_W-1:0] xgmii_rxd, output wire logic [CTRL_W-1:0] xgmii_rxc, - output wire logic xgmii_rx_valid = 1'b1, + output wire logic xgmii_rx_valid, output wire logic tx_gbx_req_sync, output wire logic tx_gbx_req_stall, input wire logic tx_gbx_sync = 1'b0,