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eth: Update example designs

Browse Source 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
This commit is contained in:
Alex Forencich
2026-05-12 01:46:11 -07:00
parent 0745952e14
commit 3541463c91
27 changed files with 215 additions and 192 deletions
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16
src/eth/example/AC701/fpga/rtl/fpga_core.sv
View File

@@ -230,8 +230,6 @@ taxi_eth_mac_1g_rgmii_fifo #(
.VENDOR(VENDOR),
.FAMILY(FAMILY),
.USE_CLK90(USE_CLK90),
.PADDING_EN(1),
.MIN_FRAME_LEN(64),
.STAT_EN(1),
.STAT_TX_LEVEL(1),
.STAT_RX_LEVEL(1),
@@ -296,10 +294,12 @@ baset_mac_inst (
/*
* Configuration
*/
.cfg_tx_max_pkt_len(16'd9218),
.cfg_tx_pad_en(1'b1),
.cfg_tx_min_pkt_len(8'd60-1),
.cfg_tx_max_pkt_len(16'd9218-1),
.cfg_tx_ifg(8'd12),
.cfg_tx_enable(1'b1),
.cfg_rx_max_pkt_len(16'd9218),
.cfg_rx_max_pkt_len(16'd9218-1),
.cfg_rx_enable(1'b1)
);
@@ -310,8 +310,6 @@ taxi_axis_if #(.DATA_W(8), .ID_W(8), .USER_EN(1), .USER_W(1)) axis_sfp_eth();
taxi_axis_if #(.DATA_W(96), .KEEP_W(1), .ID_W(8)) axis_sfp_tx_cpl();
taxi_eth_mac_1g_fifo #(
.PADDING_EN(1),
.MIN_FRAME_LEN(64),
.STAT_EN(1),
.STAT_TX_LEVEL(1),
.STAT_RX_LEVEL(1),
@@ -384,10 +382,12 @@ sfp_mac_inst (
/*
* Configuration
*/
.cfg_tx_max_pkt_len(16'd9218),
.cfg_tx_pad_en(1'b1),
.cfg_tx_min_pkt_len(8'd60-1),
.cfg_tx_max_pkt_len(16'd9218-1),
.cfg_tx_ifg(8'd12),
.cfg_tx_enable(1'b1),
.cfg_rx_max_pkt_len(16'd9218),
.cfg_rx_max_pkt_len(16'd9218-1),
.cfg_rx_enable(1'b1)
);

9
src/eth/example/ADM_PCIE_9V3/fpga/rtl/fpga_core.sv
View File

@@ -172,9 +172,7 @@ for (genvar n = 0; n < 2; n = n + 1) begin : gt_quad
// PHY parameters
.COMBINED_MAC_PCS(COMBINED_MAC_PCS),
.DATA_W(MAC_DATA_W),
.PADDING_EN(1'b1),
.DIC_EN(1'b1),
.MIN_FRAME_LEN(64),
.PTP_TS_EN(1'b0),
.PTP_TD_EN(1'b0),
.PTP_TS_FMT_TOD(1'b1),
@@ -303,6 +301,7 @@ for (genvar n = 0; n < 2; n = n + 1) begin : gt_quad
.stat_tx_pkt_vlan(),
.stat_tx_pkt_good(),
.stat_tx_pkt_bad(),
.stat_tx_pad_frame(),
.stat_tx_err_oversize(),
.stat_tx_err_user(),
.stat_tx_err_underflow(),
@@ -349,10 +348,12 @@ for (genvar n = 0; n < 2; n = n + 1) begin : gt_quad
/*
* Configuration
*/
.cfg_tx_max_pkt_len('{CNT{16'd9218}}),
.cfg_tx_pad_en('{CNT{1'b1}}),
.cfg_tx_min_pkt_len('{CNT{8'd60-1}}),
.cfg_tx_max_pkt_len('{CNT{16'd9218-1}}),
.cfg_tx_ifg('{CNT{8'd12}}),
.cfg_tx_enable('{CNT{1'b1}}),
.cfg_rx_max_pkt_len('{CNT{16'd9218}}),
.cfg_rx_max_pkt_len('{CNT{16'd9218-1}}),
.cfg_rx_enable('{CNT{1'b1}}),
.cfg_tx_prbs31_enable('{CNT{1'b0}}),
.cfg_rx_prbs31_enable('{CNT{1'b0}}),

9
src/eth/example/AS02MC04/fpga/rtl/fpga_core.sv
View File

@@ -173,9 +173,7 @@ taxi_eth_mac_25g_us #(
// MAC/PHY config
.COMBINED_MAC_PCS(COMBINED_MAC_PCS),
.DATA_W(MAC_DATA_W),
.PADDING_EN(1'b1),
.DIC_EN(1'b1),
.MIN_FRAME_LEN(64),
.PTP_TS_EN(1'b0),
.PTP_TD_EN(1'b0),
.PTP_TS_FMT_TOD(1'b1),
@@ -304,6 +302,7 @@ sfp_mac_inst (
.stat_tx_pkt_vlan(),
.stat_tx_pkt_good(),
.stat_tx_pkt_bad(),
.stat_tx_pad_frame(),
.stat_tx_err_oversize(),
.stat_tx_err_user(),
.stat_tx_err_underflow(),
@@ -350,10 +349,12 @@ sfp_mac_inst (
/*
* Configuration
*/
.cfg_tx_max_pkt_len('{2{16'd9218}}),
.cfg_tx_pad_en('{2{1'b1}}),
.cfg_tx_min_pkt_len('{2{8'd60-1}}),
.cfg_tx_max_pkt_len('{2{16'd9218-1}}),
.cfg_tx_ifg('{2{8'd12}}),
.cfg_tx_enable('{2{1'b1}}),
.cfg_rx_max_pkt_len('{2{16'd9218}}),
.cfg_rx_max_pkt_len('{2{16'd9218-1}}),
.cfg_rx_enable('{2{1'b1}}),
.cfg_tx_prbs31_enable('{2{1'b0}}),
.cfg_rx_prbs31_enable('{2{1'b0}}),

9
src/eth/example/Alveo/fpga/rtl/fpga_core.sv
View File

@@ -343,9 +343,7 @@ for (genvar n = 0; n < GTY_QUAD_CNT; n = n + 1) begin : gt_quad
// MAC/PHY config
.COMBINED_MAC_PCS(COMBINED_MAC_PCS),
.DATA_W(MAC_DATA_W),
.PADDING_EN(1'b1),
.DIC_EN(1'b1),
.MIN_FRAME_LEN(64),
.PTP_TS_EN(1'b0),
.PTP_TD_EN(1'b0),
.PTP_TS_FMT_TOD(1'b1),
@@ -480,6 +478,7 @@ for (genvar n = 0; n < GTY_QUAD_CNT; n = n + 1) begin : gt_quad
.stat_tx_pkt_vlan(),
.stat_tx_pkt_good(),
.stat_tx_pkt_bad(),
.stat_tx_pad_frame(),
.stat_tx_err_oversize(),
.stat_tx_err_user(),
.stat_tx_err_underflow(),
@@ -526,10 +525,12 @@ for (genvar n = 0; n < GTY_QUAD_CNT; n = n + 1) begin : gt_quad
/*
* Configuration
*/
.cfg_tx_max_pkt_len('{CNT{16'd9218}}),
.cfg_tx_pad_en('{CNT{1'b1}}),
.cfg_tx_min_pkt_len('{CNT{8'd60-1}}),
.cfg_tx_max_pkt_len('{CNT{16'd9218-1}}),
.cfg_tx_ifg('{CNT{8'd12}}),
.cfg_tx_enable('{CNT{1'b1}}),
.cfg_rx_max_pkt_len('{CNT{16'd9218}}),
.cfg_rx_max_pkt_len('{CNT{16'd9218-1}}),
.cfg_rx_enable('{CNT{1'b1}}),
.cfg_tx_prbs31_enable('{CNT{1'b0}}),
.cfg_rx_prbs31_enable('{CNT{1'b0}}),

8
src/eth/example/Arty/fpga/rtl/fpga_core.sv
View File

@@ -164,8 +164,6 @@ taxi_eth_mac_mii_fifo #(
.SIM(SIM),
.VENDOR(VENDOR),
.FAMILY(FAMILY),
.PADDING_EN(1),
.MIN_FRAME_LEN(64),
.STAT_EN(1),
.STAT_TX_LEVEL(1),
.STAT_RX_LEVEL(1),
@@ -229,10 +227,12 @@ eth_mac_inst (
/*
* Configuration
*/
.cfg_tx_max_pkt_len(16'd9218),
.cfg_tx_pad_en(1'b1),
.cfg_tx_min_pkt_len(8'd60-1),
.cfg_tx_max_pkt_len(16'd9218-1),
.cfg_tx_ifg(8'd12),
.cfg_tx_enable(1'b1),
.cfg_rx_max_pkt_len(16'd9218),
.cfg_rx_max_pkt_len(16'd9218-1),
.cfg_rx_enable(1'b1)
);

9
src/eth/example/HTG9200/fpga/rtl/fpga_core.sv
View File

@@ -424,9 +424,7 @@ for (genvar n = 0; n < GTY_QUAD_CNT; n = n + 1) begin : gt_quad
// MAC/PHY config
.COMBINED_MAC_PCS(COMBINED_MAC_PCS),
.DATA_W(MAC_DATA_W),
.PADDING_EN(1'b1),
.DIC_EN(1'b1),
.MIN_FRAME_LEN(64),
.PTP_TS_EN(1'b0),
.PTP_TD_EN(1'b0),
.PTP_TS_FMT_TOD(1'b1),
@@ -577,6 +575,7 @@ for (genvar n = 0; n < GTY_QUAD_CNT; n = n + 1) begin : gt_quad
.stat_tx_pkt_vlan(),
.stat_tx_pkt_good(),
.stat_tx_pkt_bad(),
.stat_tx_pad_frame(),
.stat_tx_err_oversize(),
.stat_tx_err_user(),
.stat_tx_err_underflow(),
@@ -623,10 +622,12 @@ for (genvar n = 0; n < GTY_QUAD_CNT; n = n + 1) begin : gt_quad
/*
* Configuration
*/
.cfg_tx_max_pkt_len('{CNT{16'd9218}}),
.cfg_tx_pad_en('{CNT{1'b1}}),
.cfg_tx_min_pkt_len('{CNT{8'd60-1}}),
.cfg_tx_max_pkt_len('{CNT{16'd9218-1}}),
.cfg_tx_ifg('{CNT{8'd12}}),
.cfg_tx_enable('{CNT{1'b1}}),
.cfg_rx_max_pkt_len('{CNT{16'd9218}}),
.cfg_rx_max_pkt_len('{CNT{16'd9218-1}}),
.cfg_rx_enable('{CNT{1'b1}}),
.cfg_tx_prbs31_enable('{CNT{1'b0}}),
.cfg_rx_prbs31_enable('{CNT{1'b0}}),

8
src/eth/example/HTG940/fpga/rtl/fpga_core.sv
View File

@@ -155,8 +155,6 @@ taxi_eth_mac_1g_rgmii_fifo #(
.VENDOR(VENDOR),
.FAMILY(FAMILY),
.USE_CLK90(USE_CLK90),
.PADDING_EN(1),
.MIN_FRAME_LEN(64),
.STAT_EN(1),
.STAT_TX_LEVEL(1),
.STAT_RX_LEVEL(1),
@@ -221,10 +219,12 @@ eth_mac_inst (
/*
* Configuration
*/
.cfg_tx_max_pkt_len(16'd9218),
.cfg_tx_pad_en(1'b1),
.cfg_tx_min_pkt_len(8'd60-1),
.cfg_tx_max_pkt_len(16'd9218-1),
.cfg_tx_ifg(8'd12),
.cfg_tx_enable(1'b1),
.cfg_rx_max_pkt_len(16'd9218),
.cfg_rx_max_pkt_len(16'd9218-1),
.cfg_rx_enable(1'b1)
);

9
src/eth/example/HTG_ZRF8/fpga/rtl/fpga_core.sv
View File

@@ -368,9 +368,7 @@ for (genvar n = 0; n < GTY_QUAD_CNT; n = n + 1) begin : gty_quad
// MAC/PHY config
.COMBINED_MAC_PCS(COMBINED_MAC_PCS),
.DATA_W(MAC_DATA_W),
.PADDING_EN(1'b1),
.DIC_EN(1'b1),
.MIN_FRAME_LEN(64),
.PTP_TS_EN(1'b0),
.PTP_TD_EN(1'b0),
.PTP_TS_FMT_TOD(1'b1),
@@ -508,6 +506,7 @@ for (genvar n = 0; n < GTY_QUAD_CNT; n = n + 1) begin : gty_quad
.stat_tx_pkt_vlan(),
.stat_tx_pkt_good(),
.stat_tx_pkt_bad(),
.stat_tx_pad_frame(),
.stat_tx_err_oversize(),
.stat_tx_err_user(),
.stat_tx_err_underflow(),
@@ -554,10 +553,12 @@ for (genvar n = 0; n < GTY_QUAD_CNT; n = n + 1) begin : gty_quad
/*
* Configuration
*/
.cfg_tx_max_pkt_len('{CNT{16'd9218}}),
.cfg_tx_pad_en('{CNT{1'b1}}),
.cfg_tx_min_pkt_len('{CNT{8'd60-1}}),
.cfg_tx_max_pkt_len('{CNT{16'd9218-1}}),
.cfg_tx_ifg('{CNT{8'd12}}),
.cfg_tx_enable('{CNT{1'b1}}),
.cfg_rx_max_pkt_len('{CNT{16'd9218}}),
.cfg_rx_max_pkt_len('{CNT{16'd9218-1}}),
.cfg_rx_enable('{CNT{1'b1}}),
.cfg_tx_prbs31_enable('{CNT{1'b0}}),
.cfg_rx_prbs31_enable('{CNT{1'b0}}),

32
src/eth/example/KC705/fpga/rtl/fpga_core.sv
View File

@@ -254,8 +254,6 @@ if (BASET_PHY_TYPE == "GMII") begin : baset_mac_gmii
.SIM(SIM),
.VENDOR(VENDOR),
.FAMILY(FAMILY),
.PADDING_EN(1),
.MIN_FRAME_LEN(64),
.STAT_EN(1),
.STAT_TX_LEVEL(1),
.STAT_RX_LEVEL(1),
@@ -322,10 +320,12 @@ if (BASET_PHY_TYPE == "GMII") begin : baset_mac_gmii
/*
* Configuration
*/
.cfg_tx_max_pkt_len(16'd9218),
.cfg_tx_pad_en(1'b1),
.cfg_tx_min_pkt_len(8'd60-1),
.cfg_tx_max_pkt_len(16'd9218-1),
.cfg_tx_ifg(8'd12),
.cfg_tx_enable(1'b1),
.cfg_rx_max_pkt_len(16'd9218),
.cfg_rx_max_pkt_len(16'd9218-1),
.cfg_rx_enable(1'b1)
);
@@ -344,8 +344,6 @@ end else if (BASET_PHY_TYPE == "RGMII") begin : baset_mac_rgmii
.VENDOR(VENDOR),
.FAMILY(FAMILY),
.USE_CLK90(USE_CLK90),
.PADDING_EN(1),
.MIN_FRAME_LEN(64),
.STAT_EN(1),
.STAT_TX_LEVEL(1),
.STAT_RX_LEVEL(1),
@@ -410,10 +408,12 @@ end else if (BASET_PHY_TYPE == "RGMII") begin : baset_mac_rgmii
/*
* Configuration
*/
.cfg_tx_max_pkt_len(16'd9218),
.cfg_tx_pad_en(1'b1),
.cfg_tx_min_pkt_len(8'd60-1),
.cfg_tx_max_pkt_len(16'd9218-1),
.cfg_tx_ifg(8'd12),
.cfg_tx_enable(1'b1),
.cfg_rx_max_pkt_len(16'd9218),
.cfg_rx_max_pkt_len(16'd9218-1),
.cfg_rx_enable(1'b1)
);
@@ -429,8 +429,6 @@ end else if (BASET_PHY_TYPE == "RGMII") begin : baset_mac_rgmii
end else if (BASET_PHY_TYPE == "SGMII") begin : baset_mac_sgmii
taxi_eth_mac_1g_fifo #(
.PADDING_EN(1),
.MIN_FRAME_LEN(64),
.STAT_EN(1),
.STAT_TX_LEVEL(1),
.STAT_RX_LEVEL(1),
@@ -503,10 +501,12 @@ end else if (BASET_PHY_TYPE == "SGMII") begin : baset_mac_sgmii
/*
* Configuration
*/
.cfg_tx_max_pkt_len(16'd9218),
.cfg_tx_pad_en(1'b1),
.cfg_tx_min_pkt_len(8'd60-1),
.cfg_tx_max_pkt_len(16'd9218-1),
.cfg_tx_ifg(8'd12),
.cfg_tx_enable(1'b1),
.cfg_rx_max_pkt_len(16'd9218),
.cfg_rx_max_pkt_len(16'd9218-1),
.cfg_rx_enable(1'b1)
);
@@ -528,8 +528,6 @@ taxi_axis_if #(.DATA_W(8), .ID_W(8), .USER_EN(1), .USER_W(1)) axis_sfp_eth();
taxi_axis_if #(.DATA_W(96), .KEEP_W(1), .ID_W(8)) axis_sfp_tx_cpl();
taxi_eth_mac_1g_fifo #(
.PADDING_EN(1),
.MIN_FRAME_LEN(64),
.STAT_EN(1),
.STAT_TX_LEVEL(1),
.STAT_RX_LEVEL(1),
@@ -602,10 +600,12 @@ eth_mac_inst (
/*
* Configuration
*/
.cfg_tx_max_pkt_len(16'd9218),
.cfg_tx_pad_en(1'b1),
.cfg_tx_min_pkt_len(8'd60-1),
.cfg_tx_max_pkt_len(16'd9218-1),
.cfg_tx_ifg(8'd12),
.cfg_tx_enable(1'b1),
.cfg_rx_max_pkt_len(16'd9218),
.cfg_rx_max_pkt_len(16'd9218-1),
.cfg_rx_enable(1'b1)
);

25
src/eth/example/KC705/fpga_10g/rtl/fpga_core.sv
View File

@@ -249,8 +249,6 @@ if (BASET_PHY_TYPE == "GMII") begin : baset_mac_gmii
.SIM(SIM),
.VENDOR(VENDOR),
.FAMILY(FAMILY),
.PADDING_EN(1),
.MIN_FRAME_LEN(64),
.STAT_EN(1),
.STAT_TX_LEVEL(1),
.STAT_RX_LEVEL(1),
@@ -317,10 +315,12 @@ if (BASET_PHY_TYPE == "GMII") begin : baset_mac_gmii
/*
* Configuration
*/
.cfg_tx_max_pkt_len(16'd9218),
.cfg_tx_pad_en(1'b1),
.cfg_tx_min_pkt_len(8'd60-1),
.cfg_tx_max_pkt_len(16'd9218-1),
.cfg_tx_ifg(8'd12),
.cfg_tx_enable(1'b1),
.cfg_rx_max_pkt_len(16'd9218),
.cfg_rx_max_pkt_len(16'd9218-1),
.cfg_rx_enable(1'b1)
);
@@ -331,8 +331,6 @@ end else if (BASET_PHY_TYPE == "RGMII") begin : baset_mac_rgmii
.VENDOR(VENDOR),
.FAMILY(FAMILY),
.USE_CLK90(USE_CLK90),
.PADDING_EN(1),
.MIN_FRAME_LEN(64),
.STAT_EN(1),
.STAT_TX_LEVEL(1),
.STAT_RX_LEVEL(1),
@@ -397,10 +395,12 @@ end else if (BASET_PHY_TYPE == "RGMII") begin : baset_mac_rgmii
/*
* Configuration
*/
.cfg_tx_max_pkt_len(16'd9218),
.cfg_tx_pad_en(1'b1),
.cfg_tx_min_pkt_len(8'd60-1),
.cfg_tx_max_pkt_len(16'd9218-1),
.cfg_tx_ifg(8'd12),
.cfg_tx_enable(1'b1),
.cfg_rx_max_pkt_len(16'd9218),
.cfg_rx_max_pkt_len(16'd9218-1),
.cfg_rx_enable(1'b1)
);
@@ -516,9 +516,7 @@ taxi_eth_mac_25g_us #(
// MAC/PHY config
.COMBINED_MAC_PCS(COMBINED_MAC_PCS),
.DATA_W(MAC_DATA_W),
.PADDING_EN(1'b1),
.DIC_EN(1'b1),
.MIN_FRAME_LEN(64),
.PTP_TS_EN(1'b0),
.PTP_TD_EN(1'b0),
.PTP_TS_FMT_TOD(1'b1),
@@ -657,6 +655,7 @@ sfp_mac_inst (
.stat_tx_pkt_vlan(),
.stat_tx_pkt_good(),
.stat_tx_pkt_bad(),
.stat_tx_pad_frame(),
.stat_tx_err_oversize(),
.stat_tx_err_user(),
.stat_tx_err_underflow(),
@@ -703,10 +702,12 @@ sfp_mac_inst (
/*
* Configuration
*/
.cfg_tx_max_pkt_len('{1{16'd9218}}),
.cfg_tx_pad_en('{1{1'b1}}),
.cfg_tx_min_pkt_len('{1{8'd60-1}}),
.cfg_tx_max_pkt_len('{1{16'd9218-1}}),
.cfg_tx_ifg('{1{8'd12}}),
.cfg_tx_enable('{1{1'b1}}),
.cfg_rx_max_pkt_len('{1{16'd9218}}),
.cfg_rx_max_pkt_len('{1{16'd9218-1}}),
.cfg_rx_enable('{1{1'b1}}),
.cfg_tx_prbs31_enable('{1{1'b0}}),
.cfg_rx_prbs31_enable('{1{1'b0}}),

33
src/eth/example/KCU105/fpga/rtl/fpga_core.sv
View File

@@ -249,8 +249,6 @@ taxi_axis_if #(.DATA_W(8), .ID_W(8), .USER_EN(1), .USER_W(1)) axis_eth();
taxi_axis_if #(.DATA_W(96), .KEEP_W(1), .ID_W(8)) axis_tx_cpl();
taxi_eth_mac_1g_fifo #(
.PADDING_EN(1),
.MIN_FRAME_LEN(64),
.STAT_EN(1),
.STAT_TX_LEVEL(1),
.STAT_RX_LEVEL(1),
@@ -323,10 +321,12 @@ eth_mac_inst (
/*
* Configuration
*/
.cfg_tx_max_pkt_len(16'd9218),
.cfg_tx_pad_en(1'b1),
.cfg_tx_min_pkt_len(8'd60-1),
.cfg_tx_max_pkt_len(16'd9218-1),
.cfg_tx_ifg(8'd12),
.cfg_tx_enable(1'b1),
.cfg_rx_max_pkt_len(16'd9218),
.cfg_rx_max_pkt_len(16'd9218-1),
.cfg_rx_enable(1'b1)
);
@@ -342,8 +342,6 @@ if (SFP_RATE == 0) begin : sfp_mac
taxi_axis_if #(.DATA_W(96), .KEEP_W(1), .ID_W(8)) axis_sfp1_tx_cpl();
taxi_eth_mac_1g_fifo #(
.PADDING_EN(1),
.MIN_FRAME_LEN(64),
.STAT_EN(1),
.STAT_TX_LEVEL(1),
.STAT_RX_LEVEL(1),
@@ -416,16 +414,16 @@ if (SFP_RATE == 0) begin : sfp_mac
/*
* Configuration
*/
.cfg_tx_max_pkt_len(16'd9218),
.cfg_tx_pad_en(1'b1),
.cfg_tx_min_pkt_len(8'd60-1),
.cfg_tx_max_pkt_len(16'd9218-1),
.cfg_tx_ifg(8'd12),
.cfg_tx_enable(1'b1),
.cfg_rx_max_pkt_len(16'd9218),
.cfg_rx_max_pkt_len(16'd9218-1),
.cfg_rx_enable(1'b1)
);
taxi_eth_mac_1g_fifo #(
.PADDING_EN(1),
.MIN_FRAME_LEN(64),
.STAT_EN(1),
.STAT_TX_LEVEL(1),
.STAT_RX_LEVEL(1),
@@ -498,10 +496,12 @@ if (SFP_RATE == 0) begin : sfp_mac
/*
* Configuration
*/
.cfg_tx_max_pkt_len(16'd9218),
.cfg_tx_pad_en(1'b1),
.cfg_tx_min_pkt_len(8'd60-1),
.cfg_tx_max_pkt_len(16'd9218-1),
.cfg_tx_ifg(8'd12),
.cfg_tx_enable(1'b1),
.cfg_rx_max_pkt_len(16'd9218),
.cfg_rx_max_pkt_len(16'd9218-1),
.cfg_rx_enable(1'b1)
);
@@ -603,9 +603,7 @@ end else begin : sfp_mac
// PHY parameters
.DATA_W(axis_sfp_tx[0].DATA_W),
.PADDING_EN(1'b1),
.DIC_EN(1'b1),
.MIN_FRAME_LEN(64),
.PTP_TS_EN(1'b0),
.PTP_TD_EN(1'b0),
.PTP_TS_FMT_TOD(1'b1),
@@ -741,6 +739,7 @@ end else begin : sfp_mac
.stat_tx_pkt_vlan(),
.stat_tx_pkt_good(),
.stat_tx_pkt_bad(),
.stat_tx_pad_frame(),
.stat_tx_err_oversize(),
.stat_tx_err_user(),
.stat_tx_err_underflow(),
@@ -787,10 +786,12 @@ end else begin : sfp_mac
/*
* Configuration
*/
.cfg_tx_max_pkt_len('{2{16'd9218}}),
.cfg_tx_pad_en('{2{1'b1}}),
.cfg_tx_min_pkt_len('{2{8'd60-1}}),
.cfg_tx_max_pkt_len('{2{16'd9218-1}}),
.cfg_tx_ifg('{2{8'd12}}),
.cfg_tx_enable('{2{1'b1}}),
.cfg_rx_max_pkt_len('{2{16'd9218}}),
.cfg_rx_max_pkt_len('{2{16'd9218-1}}),
.cfg_rx_enable('{2{1'b1}}),
.cfg_tx_prbs31_enable('{2{1'b0}}),
.cfg_rx_prbs31_enable('{2{1'b0}}),

33
src/eth/example/KR260/fpga/rtl/fpga_core.sv
View File

@@ -112,8 +112,6 @@ taxi_eth_mac_1g_rgmii_fifo #(
.VENDOR(VENDOR),
.FAMILY(FAMILY),
.USE_CLK90(USE_CLK90),
.PADDING_EN(1),
.MIN_FRAME_LEN(64),
.STAT_EN(1'b0),
.TX_FIFO_DEPTH(16384),
.TX_FRAME_FIFO(1),
@@ -172,10 +170,12 @@ phy2_eth_mac_inst (
/*
* Configuration
*/
.cfg_tx_max_pkt_len(16'd9218),
.cfg_tx_pad_en(1'b1),
.cfg_tx_min_pkt_len(8'd60-1),
.cfg_tx_max_pkt_len(16'd9218-1),
.cfg_tx_ifg(8'd12),
.cfg_tx_enable(1'b1),
.cfg_rx_max_pkt_len(16'd9218),
.cfg_rx_max_pkt_len(16'd9218-1),
.cfg_rx_enable(1'b1)
);
@@ -184,8 +184,6 @@ taxi_eth_mac_1g_rgmii_fifo #(
.VENDOR(VENDOR),
.FAMILY(FAMILY),
.USE_CLK90(USE_CLK90),
.PADDING_EN(1),
.MIN_FRAME_LEN(64),
.STAT_EN(1'b0),
.TX_FIFO_DEPTH(16384),
.TX_FRAME_FIFO(1),
@@ -244,10 +242,12 @@ phy3_eth_mac_inst (
/*
* Configuration
*/
.cfg_tx_max_pkt_len(16'd9218),
.cfg_tx_pad_en(1'b1),
.cfg_tx_min_pkt_len(8'd60-1),
.cfg_tx_max_pkt_len(16'd9218-1),
.cfg_tx_ifg(8'd12),
.cfg_tx_enable(1'b1),
.cfg_rx_max_pkt_len(16'd9218),
.cfg_rx_max_pkt_len(16'd9218-1),
.cfg_rx_enable(1'b1)
);
@@ -261,8 +261,6 @@ if (SFP_RATE == 0) begin : sfp_mac
taxi_axis_if #(.DATA_W(16), .KEEP_W(1), .KEEP_EN(0), .LAST_EN(0), .USER_EN(1), .USER_W(1), .ID_EN(1), .ID_W(8)) axis_sfp_stat();
taxi_eth_mac_1g_fifo #(
.PADDING_EN(1),
.MIN_FRAME_LEN(64),
.STAT_EN(1'b0),
.TX_FIFO_DEPTH(16384),
.TX_FRAME_FIFO(1),
@@ -329,10 +327,12 @@ if (SFP_RATE == 0) begin : sfp_mac
/*
* Configuration
*/
.cfg_tx_max_pkt_len(16'd9218),
.cfg_tx_pad_en(1'b1),
.cfg_tx_min_pkt_len(8'd60-1),
.cfg_tx_max_pkt_len(16'd9218-1),
.cfg_tx_ifg(8'd12),
.cfg_tx_enable(1'b1),
.cfg_rx_max_pkt_len(16'd9218),
.cfg_rx_max_pkt_len(16'd9218-1),
.cfg_rx_enable(1'b1)
);
@@ -416,9 +416,7 @@ end else begin : sfp_mac
// PHY parameters
.DATA_W(axis_sfp_tx[0].DATA_W),
.PADDING_EN(1'b1),
.DIC_EN(1'b1),
.MIN_FRAME_LEN(64),
.PTP_TS_EN(1'b0),
.PTP_TD_EN(1'b0),
.PTP_TS_FMT_TOD(1'b1),
@@ -547,6 +545,7 @@ end else begin : sfp_mac
.stat_tx_pkt_vlan(),
.stat_tx_pkt_good(),
.stat_tx_pkt_bad(),
.stat_tx_pad_frame(),
.stat_tx_err_oversize(),
.stat_tx_err_user(),
.stat_tx_err_underflow(),
@@ -593,10 +592,12 @@ end else begin : sfp_mac
/*
* Configuration
*/
.cfg_tx_max_pkt_len('{1{16'd9218}}),
.cfg_tx_pad_en('{1{1'b1}}),
.cfg_tx_min_pkt_len('{1{8'd60-1}}),
.cfg_tx_max_pkt_len('{1{16'd9218-1}}),
.cfg_tx_ifg('{1{8'd12}}),
.cfg_tx_enable('{1{1'b1}}),
.cfg_rx_max_pkt_len('{1{16'd9218}}),
.cfg_rx_max_pkt_len('{1{16'd9218-1}}),
.cfg_rx_enable('{1{1'b1}}),
.cfg_tx_prbs31_enable('{1{1'b0}}),
.cfg_rx_prbs31_enable('{1{1'b0}}),

9
src/eth/example/NT200A02/fpga/rtl/fpga_core.sv
View File

@@ -201,9 +201,7 @@ for (genvar n = 0; n < GTY_QUAD_CNT; n = n + 1) begin : gt_quad
// MAC/PHY config
.COMBINED_MAC_PCS(COMBINED_MAC_PCS),
.DATA_W(MAC_DATA_W),
.PADDING_EN(1'b1),
.DIC_EN(1'b1),
.MIN_FRAME_LEN(64),
.PTP_TS_EN(1'b0),
.PTP_TD_EN(1'b0),
.PTP_TS_FMT_TOD(1'b1),
@@ -338,6 +336,7 @@ for (genvar n = 0; n < GTY_QUAD_CNT; n = n + 1) begin : gt_quad
.stat_tx_pkt_vlan(),
.stat_tx_pkt_good(),
.stat_tx_pkt_bad(),
.stat_tx_pad_frame(),
.stat_tx_err_oversize(),
.stat_tx_err_user(),
.stat_tx_err_underflow(),
@@ -384,10 +383,12 @@ for (genvar n = 0; n < GTY_QUAD_CNT; n = n + 1) begin : gt_quad
/*
* Configuration
*/
.cfg_tx_max_pkt_len('{CNT{16'd9218}}),
.cfg_tx_pad_en('{CNT{1'b1}}),
.cfg_tx_min_pkt_len('{CNT{8'd60-1}}),
.cfg_tx_max_pkt_len('{CNT{16'd9218-1}}),
.cfg_tx_ifg('{CNT{8'd12}}),
.cfg_tx_enable('{CNT{1'b1}}),
.cfg_rx_max_pkt_len('{CNT{16'd9218}}),
.cfg_rx_max_pkt_len('{CNT{16'd9218-1}}),
.cfg_rx_enable('{CNT{1'b1}}),
.cfg_tx_prbs31_enable('{CNT{1'b0}}),
.cfg_rx_prbs31_enable('{CNT{1'b0}}),

9
src/eth/example/NT40E3/fpga/rtl/fpga_core.sv
View File

@@ -158,9 +158,7 @@ for (genvar n = 0; n < 2; n = n + 1) begin : gt_quad
// MAC/PHY config
.COMBINED_MAC_PCS(COMBINED_MAC_PCS),
.DATA_W(MAC_DATA_W),
.PADDING_EN(1'b1),
.DIC_EN(1'b1),
.MIN_FRAME_LEN(64),
.PTP_TS_EN(1'b0),
.PTP_TD_EN(1'b0),
.PTP_TS_FMT_TOD(1'b1),
@@ -289,6 +287,7 @@ for (genvar n = 0; n < 2; n = n + 1) begin : gt_quad
.stat_tx_pkt_vlan(),
.stat_tx_pkt_good(),
.stat_tx_pkt_bad(),
.stat_tx_pad_frame(),
.stat_tx_err_oversize(),
.stat_tx_err_user(),
.stat_tx_err_underflow(),
@@ -335,10 +334,12 @@ for (genvar n = 0; n < 2; n = n + 1) begin : gt_quad
/*
* Configuration
*/
.cfg_tx_max_pkt_len('{CNT{16'd9218}}),
.cfg_tx_pad_en('{CNT{1'b1}}),
.cfg_tx_min_pkt_len('{CNT{8'd60-1}}),
.cfg_tx_max_pkt_len('{CNT{16'd9218-1}}),
.cfg_tx_ifg('{CNT{8'd12}}),
.cfg_tx_enable('{CNT{1'b1}}),
.cfg_rx_max_pkt_len('{CNT{16'd9218}}),
.cfg_rx_max_pkt_len('{CNT{16'd9218-1}}),
.cfg_rx_enable('{CNT{1'b1}}),
.cfg_tx_prbs31_enable('{CNT{1'b0}}),
.cfg_rx_prbs31_enable('{CNT{1'b0}}),

9
src/eth/example/NetFPGA_SUME/fpga/rtl/fpga_core.sv
View File

@@ -305,9 +305,7 @@ taxi_eth_mac_25g_us #(
// MAC/PHY config
.COMBINED_MAC_PCS(COMBINED_MAC_PCS),
.DATA_W(MAC_DATA_W),
.PADDING_EN(1'b1),
.DIC_EN(1'b1),
.MIN_FRAME_LEN(64),
.PTP_TS_EN(1'b0),
.PTP_TD_EN(1'b0),
.PTP_TS_FMT_TOD(1'b1),
@@ -442,6 +440,7 @@ sfp_mac_inst (
.stat_tx_pkt_vlan(),
.stat_tx_pkt_good(),
.stat_tx_pkt_bad(),
.stat_tx_pad_frame(),
.stat_tx_err_oversize(),
.stat_tx_err_user(),
.stat_tx_err_underflow(),
@@ -488,10 +487,12 @@ sfp_mac_inst (
/*
* Configuration
*/
.cfg_tx_max_pkt_len('{4{16'd9218}}),
.cfg_tx_pad_en('{4{1'b1}}),
.cfg_tx_min_pkt_len('{4{8'd60-1}}),
.cfg_tx_max_pkt_len('{4{16'd9218-1}}),
.cfg_tx_ifg('{4{8'd12}}),
.cfg_tx_enable('{4{1'b1}}),
.cfg_rx_max_pkt_len('{4{16'd9218}}),
.cfg_rx_max_pkt_len('{4{16'd9218-1}}),
.cfg_rx_enable('{4{1'b1}}),
.cfg_tx_prbs31_enable('{4{1'b0}}),
.cfg_rx_prbs31_enable('{4{1'b0}}),

9
src/eth/example/Nexus_K3P_Q/fpga/rtl/fpga_core.sv
View File

@@ -191,9 +191,7 @@ for (genvar n = 0; n < 2; n = n + 1) begin : gt_quad
// MAC/PHY config
.COMBINED_MAC_PCS(COMBINED_MAC_PCS),
.DATA_W(MAC_DATA_W),
.PADDING_EN(1'b1),
.DIC_EN(1'b1),
.MIN_FRAME_LEN(64),
.PTP_TS_EN(1'b0),
.PTP_TD_EN(1'b0),
.PTP_TS_FMT_TOD(1'b1),
@@ -322,6 +320,7 @@ for (genvar n = 0; n < 2; n = n + 1) begin : gt_quad
.stat_tx_pkt_vlan(),
.stat_tx_pkt_good(),
.stat_tx_pkt_bad(),
.stat_tx_pad_frame(),
.stat_tx_err_oversize(),
.stat_tx_err_user(),
.stat_tx_err_underflow(),
@@ -368,10 +367,12 @@ for (genvar n = 0; n < 2; n = n + 1) begin : gt_quad
/*
* Configuration
*/
.cfg_tx_max_pkt_len('{CNT{16'd9218}}),
.cfg_tx_pad_en('{CNT{1'b1}}),
.cfg_tx_min_pkt_len('{CNT{8'd60-1}}),
.cfg_tx_max_pkt_len('{CNT{16'd9218-1}}),
.cfg_tx_ifg('{CNT{8'd12}}),
.cfg_tx_enable('{CNT{1'b1}}),
.cfg_rx_max_pkt_len('{CNT{16'd9218}}),
.cfg_rx_max_pkt_len('{CNT{16'd9218-1}}),
.cfg_rx_enable('{CNT{1'b1}}),
.cfg_tx_prbs31_enable('{CNT{1'b0}}),
.cfg_rx_prbs31_enable('{CNT{1'b0}}),

9
src/eth/example/Nexus_K3P_S/fpga/rtl/fpga_core.sv
View File

@@ -167,9 +167,7 @@ taxi_eth_mac_25g_us #(
// MAC/PHY config
.COMBINED_MAC_PCS(COMBINED_MAC_PCS),
.DATA_W(MAC_DATA_W),
.PADDING_EN(1'b1),
.DIC_EN(1'b1),
.MIN_FRAME_LEN(64),
.PTP_TS_EN(1'b0),
.PTP_TD_EN(1'b0),
.PTP_TS_FMT_TOD(1'b1),
@@ -298,6 +296,7 @@ sfp_mac_inst (
.stat_tx_pkt_vlan(),
.stat_tx_pkt_good(),
.stat_tx_pkt_bad(),
.stat_tx_pad_frame(),
.stat_tx_err_oversize(),
.stat_tx_err_user(),
.stat_tx_err_underflow(),
@@ -344,10 +343,12 @@ sfp_mac_inst (
/*
* Configuration
*/
.cfg_tx_max_pkt_len('{2{16'd9218}}),
.cfg_tx_pad_en('{2{1'b1}}),
.cfg_tx_min_pkt_len('{2{8'd60-1}}),
.cfg_tx_max_pkt_len('{2{16'd9218-1}}),
.cfg_tx_ifg('{2{8'd12}}),
.cfg_tx_enable('{2{1'b1}}),
.cfg_rx_max_pkt_len('{2{16'd9218}}),
.cfg_rx_max_pkt_len('{2{16'd9218-1}}),
.cfg_rx_enable('{2{1'b1}}),
.cfg_tx_prbs31_enable('{2{1'b0}}),
.cfg_rx_prbs31_enable('{2{1'b0}}),

17
src/eth/example/RK_XCKU5P_F/fpga/rtl/fpga_core.sv
View File

@@ -190,8 +190,6 @@ taxi_eth_mac_1g_rgmii_fifo #(
.VENDOR(VENDOR),
.FAMILY(FAMILY),
.USE_CLK90(USE_CLK90),
.PADDING_EN(1),
.MIN_FRAME_LEN(64),
.STAT_EN(1),
.STAT_TX_LEVEL(1),
.STAT_RX_LEVEL(1),
@@ -256,10 +254,12 @@ eth_mac_inst (
/*
* Configuration
*/
.cfg_tx_max_pkt_len(16'd9218),
.cfg_tx_pad_en(1'b1),
.cfg_tx_min_pkt_len(8'd60-1),
.cfg_tx_max_pkt_len(16'd9218-1),
.cfg_tx_ifg(8'd12),
.cfg_tx_enable(1'b1),
.cfg_rx_max_pkt_len(16'd9218),
.cfg_rx_max_pkt_len(16'd9218-1),
.cfg_rx_enable(1'b1)
);
@@ -371,9 +371,7 @@ taxi_eth_mac_25g_us #(
// MAC/PHY config
.COMBINED_MAC_PCS(COMBINED_MAC_PCS),
.DATA_W(MAC_DATA_W),
.PADDING_EN(1'b1),
.DIC_EN(1'b1),
.MIN_FRAME_LEN(64),
.PTP_TS_EN(1'b0),
.PTP_TD_EN(1'b0),
.PTP_TS_FMT_TOD(1'b1),
@@ -508,6 +506,7 @@ qsfp_mac_inst (
.stat_tx_pkt_vlan(),
.stat_tx_pkt_good(),
.stat_tx_pkt_bad(),
.stat_tx_pad_frame(),
.stat_tx_err_oversize(),
.stat_tx_err_user(),
.stat_tx_err_underflow(),
@@ -554,10 +553,12 @@ qsfp_mac_inst (
/*
* Configuration
*/
.cfg_tx_max_pkt_len('{4{16'd9218}}),
.cfg_tx_pad_en('{4{1'b1}}),
.cfg_tx_min_pkt_len('{4{8'd60-1}}),
.cfg_tx_max_pkt_len('{4{16'd9218-1}}),
.cfg_tx_ifg('{4{8'd12}}),
.cfg_tx_enable('{4{1'b1}}),
.cfg_rx_max_pkt_len('{4{16'd9218}}),
.cfg_rx_max_pkt_len('{4{16'd9218-1}}),
.cfg_rx_enable('{4{1'b1}}),
.cfg_tx_prbs31_enable('{4{1'b0}}),
.cfg_rx_prbs31_enable('{4{1'b0}}),

9
src/eth/example/VC709/fpga/rtl/fpga_core.sv
View File

@@ -310,9 +310,7 @@ taxi_eth_mac_25g_us #(
// MAC/PHY config
.COMBINED_MAC_PCS(COMBINED_MAC_PCS),
.DATA_W(MAC_DATA_W),
.PADDING_EN(1'b1),
.DIC_EN(1'b1),
.MIN_FRAME_LEN(64),
.PTP_TS_EN(1'b0),
.PTP_TD_EN(1'b0),
.PTP_TS_FMT_TOD(1'b1),
@@ -447,6 +445,7 @@ sfp_mac_inst (
.stat_tx_pkt_vlan(),
.stat_tx_pkt_good(),
.stat_tx_pkt_bad(),
.stat_tx_pad_frame(),
.stat_tx_err_oversize(),
.stat_tx_err_user(),
.stat_tx_err_underflow(),
@@ -493,10 +492,12 @@ sfp_mac_inst (
/*
* Configuration
*/
.cfg_tx_max_pkt_len('{4{16'd9218}}),
.cfg_tx_pad_en('{4{1'b1}}),
.cfg_tx_min_pkt_len('{4{8'd60-1}}),
.cfg_tx_max_pkt_len('{4{16'd9218-1}}),
.cfg_tx_ifg('{4{8'd12}}),
.cfg_tx_enable('{4{1'b1}}),
.cfg_rx_max_pkt_len('{4{16'd9218}}),
.cfg_rx_max_pkt_len('{4{16'd9218-1}}),
.cfg_rx_enable('{4{1'b1}}),
.cfg_tx_prbs31_enable('{4{1'b0}}),
.cfg_rx_prbs31_enable('{4{1'b0}}),

17
src/eth/example/VCU108/fpga/rtl/fpga_core.sv
View File

@@ -205,8 +205,6 @@ taxi_axis_if #(.DATA_W(8), .ID_W(8), .USER_EN(1), .USER_W(1)) axis_eth();
taxi_axis_if #(.DATA_W(96), .KEEP_W(1), .ID_W(8)) axis_tx_cpl();
taxi_eth_mac_1g_fifo #(
.PADDING_EN(1),
.MIN_FRAME_LEN(64),
.STAT_EN(1),
.STAT_TX_LEVEL(1),
.STAT_RX_LEVEL(1),
@@ -279,10 +277,12 @@ eth_mac_inst (
/*
* Configuration
*/
.cfg_tx_max_pkt_len(16'd9218),
.cfg_tx_pad_en(1'b1),
.cfg_tx_min_pkt_len(8'd60-1),
.cfg_tx_max_pkt_len(16'd9218-1),
.cfg_tx_ifg(8'd12),
.cfg_tx_enable(1'b1),
.cfg_rx_max_pkt_len(16'd9218),
.cfg_rx_max_pkt_len(16'd9218-1),
.cfg_rx_enable(1'b1)
);
@@ -398,9 +398,7 @@ taxi_eth_mac_25g_us #(
// MAC/PHY config
.COMBINED_MAC_PCS(COMBINED_MAC_PCS),
.DATA_W(MAC_DATA_W),
.PADDING_EN(1'b1),
.DIC_EN(1'b1),
.MIN_FRAME_LEN(64),
.PTP_TS_EN(1'b0),
.PTP_TD_EN(1'b0),
.PTP_TS_FMT_TOD(1'b1),
@@ -535,6 +533,7 @@ qsfp_mac_inst (
.stat_tx_pkt_vlan(),
.stat_tx_pkt_good(),
.stat_tx_pkt_bad(),
.stat_tx_pad_frame(),
.stat_tx_err_oversize(),
.stat_tx_err_user(),
.stat_tx_err_underflow(),
@@ -581,10 +580,12 @@ qsfp_mac_inst (
/*
* Configuration
*/
.cfg_tx_max_pkt_len('{4{16'd9218}}),
.cfg_tx_pad_en('{4{1'b1}}),
.cfg_tx_min_pkt_len('{4{8'd60-1}}),
.cfg_tx_max_pkt_len('{4{16'd9218-1}}),
.cfg_tx_ifg('{4{8'd12}}),
.cfg_tx_enable('{4{1'b1}}),
.cfg_rx_max_pkt_len('{4{16'd9218}}),
.cfg_rx_max_pkt_len('{4{16'd9218-1}}),
.cfg_rx_enable('{4{1'b1}}),
.cfg_tx_prbs31_enable('{4{1'b0}}),
.cfg_rx_prbs31_enable('{4{1'b0}}),

17
src/eth/example/VCU118/fpga/rtl/fpga_core.sv
View File

@@ -223,8 +223,6 @@ taxi_axis_if #(.DATA_W(8), .ID_W(8), .USER_EN(1), .USER_W(1)) axis_eth();
taxi_axis_if #(.DATA_W(96), .KEEP_W(1), .ID_W(8)) axis_tx_cpl();
taxi_eth_mac_1g_fifo #(
.PADDING_EN(1),
.MIN_FRAME_LEN(64),
.STAT_EN(1),
.STAT_TX_LEVEL(1),
.STAT_RX_LEVEL(1),
@@ -297,10 +295,12 @@ eth_mac_inst (
/*
* Configuration
*/
.cfg_tx_max_pkt_len(16'd9218),
.cfg_tx_pad_en(1'b1),
.cfg_tx_min_pkt_len(8'd60-1),
.cfg_tx_max_pkt_len(16'd9218-1),
.cfg_tx_ifg(8'd12),
.cfg_tx_enable(1'b1),
.cfg_rx_max_pkt_len(16'd9218),
.cfg_rx_max_pkt_len(16'd9218-1),
.cfg_rx_enable(1'b1)
);
@@ -595,9 +595,7 @@ for (genvar n = 0; n < 2; n = n + 1) begin : gt_quad
// MAC/PHY config
.COMBINED_MAC_PCS(COMBINED_MAC_PCS),
.DATA_W(MAC_DATA_W),
.PADDING_EN(1'b1),
.DIC_EN(1'b1),
.MIN_FRAME_LEN(64),
.PTP_TS_EN(1'b0),
.PTP_TD_EN(1'b0),
.PTP_TS_FMT_TOD(1'b1),
@@ -732,6 +730,7 @@ for (genvar n = 0; n < 2; n = n + 1) begin : gt_quad
.stat_tx_pkt_vlan(),
.stat_tx_pkt_good(),
.stat_tx_pkt_bad(),
.stat_tx_pad_frame(),
.stat_tx_err_oversize(),
.stat_tx_err_user(),
.stat_tx_err_underflow(),
@@ -778,10 +777,12 @@ for (genvar n = 0; n < 2; n = n + 1) begin : gt_quad
/*
* Configuration
*/
.cfg_tx_max_pkt_len('{CNT{16'd9218}}),
.cfg_tx_pad_en('{CNT{1'b1}}),
.cfg_tx_min_pkt_len('{CNT{8'd60-1}}),
.cfg_tx_max_pkt_len('{CNT{16'd9218-1}}),
.cfg_tx_ifg('{CNT{8'd12}}),
.cfg_tx_enable('{CNT{1'b1}}),
.cfg_rx_max_pkt_len('{CNT{16'd9218}}),
.cfg_rx_max_pkt_len('{CNT{16'd9218-1}}),
.cfg_rx_enable('{CNT{1'b1}}),
.cfg_tx_prbs31_enable('{CNT{1'b0}}),
.cfg_rx_prbs31_enable('{CNT{1'b0}}),

9
src/eth/example/XEM8320/fpga/rtl/fpga_core.sv
View File

@@ -147,9 +147,7 @@ taxi_eth_mac_25g_us #(
// PHY parameters
.DATA_W(axis_sfp_tx[0].DATA_W),
.PADDING_EN(1'b1),
.DIC_EN(1'b1),
.MIN_FRAME_LEN(64),
.PTP_TS_EN(1'b0),
.PTP_TD_EN(1'b0),
.PTP_TS_FMT_TOD(1'b1),
@@ -278,6 +276,7 @@ sfp_mac_inst (
.stat_tx_pkt_vlan(),
.stat_tx_pkt_good(),
.stat_tx_pkt_bad(),
.stat_tx_pad_frame(),
.stat_tx_err_oversize(),
.stat_tx_err_user(),
.stat_tx_err_underflow(),
@@ -324,10 +323,12 @@ sfp_mac_inst (
/*
* Configuration
*/
.cfg_tx_max_pkt_len('{2{16'd9218}}),
.cfg_tx_pad_en('{2{1'b1}}),
.cfg_tx_min_pkt_len('{2{8'd60-1}}),
.cfg_tx_max_pkt_len('{2{16'd9218-1}}),
.cfg_tx_ifg('{2{8'd12}}),
.cfg_tx_enable('{2{1'b1}}),
.cfg_rx_max_pkt_len('{2{16'd9218}}),
.cfg_rx_max_pkt_len('{2{16'd9218-1}}),
.cfg_rx_enable('{2{1'b1}}),
.cfg_tx_prbs31_enable('{2{1'b0}}),
.cfg_rx_prbs31_enable('{2{1'b0}}),

9
src/eth/example/XUPP3R/fpga/rtl/fpga_core.sv
View File

@@ -322,9 +322,7 @@ for (genvar n = 0; n < GTY_QUAD_CNT; n = n + 1) begin : gt_quad
// MAC/PHY config
.COMBINED_MAC_PCS(COMBINED_MAC_PCS),
.DATA_W(MAC_DATA_W),
.PADDING_EN(1'b1),
.DIC_EN(1'b1),
.MIN_FRAME_LEN(64),
.PTP_TS_EN(1'b0),
.PTP_TD_EN(1'b0),
.PTP_TS_FMT_TOD(1'b1),
@@ -461,6 +459,7 @@ for (genvar n = 0; n < GTY_QUAD_CNT; n = n + 1) begin : gt_quad
.stat_tx_pkt_vlan(),
.stat_tx_pkt_good(),
.stat_tx_pkt_bad(),
.stat_tx_pad_frame(),
.stat_tx_err_oversize(),
.stat_tx_err_user(),
.stat_tx_err_underflow(),
@@ -507,10 +506,12 @@ for (genvar n = 0; n < GTY_QUAD_CNT; n = n + 1) begin : gt_quad
/*
* Configuration
*/
.cfg_tx_max_pkt_len('{CNT{16'd9218}}),
.cfg_tx_pad_en('{CNT{1'b1}}),
.cfg_tx_min_pkt_len('{CNT{8'd60-1}}),
.cfg_tx_max_pkt_len('{CNT{16'd9218-1}}),
.cfg_tx_ifg('{CNT{8'd12}}),
.cfg_tx_enable('{CNT{1'b1}}),
.cfg_rx_max_pkt_len('{CNT{16'd9218}}),
.cfg_rx_max_pkt_len('{CNT{16'd9218-1}}),
.cfg_rx_enable('{CNT{1'b1}}),
.cfg_tx_prbs31_enable('{CNT{1'b0}}),
.cfg_rx_prbs31_enable('{CNT{1'b0}}),

41
src/eth/example/ZCU102/fpga/rtl/fpga_core.sv
View File

@@ -232,8 +232,6 @@ if (SFP_RATE == 0) begin : sfp_mac
taxi_axis_if #(.DATA_W(96), .KEEP_W(1), .ID_W(8)) axis_sfp3_tx_cpl();
taxi_eth_mac_1g_fifo #(
.PADDING_EN(1),
.MIN_FRAME_LEN(64),
.STAT_EN(1),
.STAT_TX_LEVEL(1),
.STAT_RX_LEVEL(1),
@@ -306,16 +304,16 @@ if (SFP_RATE == 0) begin : sfp_mac
/*
* Configuration
*/
.cfg_tx_max_pkt_len(16'd9218),
.cfg_tx_pad_en(1'b1),
.cfg_tx_min_pkt_len(8'd60-1),
.cfg_tx_max_pkt_len(16'd9218-1),
.cfg_tx_ifg(8'd12),
.cfg_tx_enable(1'b1),
.cfg_rx_max_pkt_len(16'd9218),
.cfg_rx_max_pkt_len(16'd9218-1),
.cfg_rx_enable(1'b1)
);
taxi_eth_mac_1g_fifo #(
.PADDING_EN(1),
.MIN_FRAME_LEN(64),
.STAT_EN(1),
.STAT_TX_LEVEL(1),
.STAT_RX_LEVEL(1),
@@ -388,16 +386,16 @@ if (SFP_RATE == 0) begin : sfp_mac
/*
* Configuration
*/
.cfg_tx_max_pkt_len(16'd9218),
.cfg_tx_pad_en(1'b1),
.cfg_tx_min_pkt_len(8'd60-1),
.cfg_tx_max_pkt_len(16'd9218-1),
.cfg_tx_ifg(8'd12),
.cfg_tx_enable(1'b1),
.cfg_rx_max_pkt_len(16'd9218),
.cfg_rx_max_pkt_len(16'd9218-1),
.cfg_rx_enable(1'b1)
);
taxi_eth_mac_1g_fifo #(
.PADDING_EN(1),
.MIN_FRAME_LEN(64),
.STAT_EN(1),
.STAT_TX_LEVEL(1),
.STAT_RX_LEVEL(1),
@@ -470,16 +468,16 @@ if (SFP_RATE == 0) begin : sfp_mac
/*
* Configuration
*/
.cfg_tx_max_pkt_len(16'd9218),
.cfg_tx_pad_en(1'b1),
.cfg_tx_min_pkt_len(8'd60-1),
.cfg_tx_max_pkt_len(16'd9218-1),
.cfg_tx_ifg(8'd12),
.cfg_tx_enable(1'b1),
.cfg_rx_max_pkt_len(16'd9218),
.cfg_rx_max_pkt_len(16'd9218-1),
.cfg_rx_enable(1'b1)
);
taxi_eth_mac_1g_fifo #(
.PADDING_EN(1),
.MIN_FRAME_LEN(64),
.STAT_EN(1),
.STAT_TX_LEVEL(1),
.STAT_RX_LEVEL(1),
@@ -552,10 +550,12 @@ if (SFP_RATE == 0) begin : sfp_mac
/*
* Configuration
*/
.cfg_tx_max_pkt_len(16'd9218),
.cfg_tx_pad_en(1'b1),
.cfg_tx_min_pkt_len(8'd60-1),
.cfg_tx_max_pkt_len(16'd9218-1),
.cfg_tx_ifg(8'd12),
.cfg_tx_enable(1'b1),
.cfg_rx_max_pkt_len(16'd9218),
.cfg_rx_max_pkt_len(16'd9218-1),
.cfg_rx_enable(1'b1)
);
@@ -657,9 +657,7 @@ end else begin : sfp_mac
// PHY parameters
.DATA_W(axis_sfp_tx[0].DATA_W),
.PADDING_EN(1'b1),
.DIC_EN(1'b1),
.MIN_FRAME_LEN(64),
.PTP_TS_EN(1'b0),
.PTP_TD_EN(1'b0),
.PTP_TS_FMT_TOD(1'b1),
@@ -794,6 +792,7 @@ end else begin : sfp_mac
.stat_tx_pkt_vlan(),
.stat_tx_pkt_good(),
.stat_tx_pkt_bad(),
.stat_tx_pad_frame(),
.stat_tx_err_oversize(),
.stat_tx_err_user(),
.stat_tx_err_underflow(),
@@ -840,10 +839,12 @@ end else begin : sfp_mac
/*
* Configuration
*/
.cfg_tx_max_pkt_len('{4{16'd9218}}),
.cfg_tx_pad_en('{4{1'b1}}),
.cfg_tx_min_pkt_len('{4{8'd60-1}}),
.cfg_tx_max_pkt_len('{4{16'd9218-1}}),
.cfg_tx_ifg('{4{8'd12}}),
.cfg_tx_enable('{4{1'b1}}),
.cfg_rx_max_pkt_len('{4{16'd9218}}),
.cfg_rx_max_pkt_len('{4{16'd9218-1}}),
.cfg_rx_enable('{4{1'b1}}),
.cfg_tx_prbs31_enable('{4{1'b0}}),
.cfg_rx_prbs31_enable('{4{1'b0}}),

25
src/eth/example/ZCU106/fpga/rtl/fpga_core.sv
View File

@@ -210,8 +210,6 @@ if (SFP_RATE == 0) begin : sfp_mac
taxi_axis_if #(.DATA_W(96), .KEEP_W(1), .ID_W(8)) axis_sfp1_tx_cpl();
taxi_eth_mac_1g_fifo #(
.PADDING_EN(1),
.MIN_FRAME_LEN(64),
.STAT_EN(1),
.STAT_TX_LEVEL(1),
.STAT_RX_LEVEL(1),
@@ -284,16 +282,16 @@ if (SFP_RATE == 0) begin : sfp_mac
/*
* Configuration
*/
.cfg_tx_max_pkt_len(16'd9218),
.cfg_tx_pad_en(1'b1),
.cfg_tx_min_pkt_len(8'd60-1),
.cfg_tx_max_pkt_len(16'd9218-1),
.cfg_tx_ifg(8'd12),
.cfg_tx_enable(1'b1),
.cfg_rx_max_pkt_len(16'd9218),
.cfg_rx_max_pkt_len(16'd9218-1),
.cfg_rx_enable(1'b1)
);
taxi_eth_mac_1g_fifo #(
.PADDING_EN(1),
.MIN_FRAME_LEN(64),
.STAT_EN(1),
.STAT_TX_LEVEL(1),
.STAT_RX_LEVEL(1),
@@ -366,10 +364,12 @@ if (SFP_RATE == 0) begin : sfp_mac
/*
* Configuration
*/
.cfg_tx_max_pkt_len(16'd9218),
.cfg_tx_pad_en(1'b1),
.cfg_tx_min_pkt_len(8'd60-1),
.cfg_tx_max_pkt_len(16'd9218-1),
.cfg_tx_ifg(8'd12),
.cfg_tx_enable(1'b1),
.cfg_rx_max_pkt_len(16'd9218),
.cfg_rx_max_pkt_len(16'd9218-1),
.cfg_rx_enable(1'b1)
);
@@ -472,9 +472,7 @@ end else begin : sfp_mac
// PHY parameters
.COMBINED_MAC_PCS(COMBINED_MAC_PCS),
.DATA_W(MAC_DATA_W),
.PADDING_EN(1'b1),
.DIC_EN(1'b1),
.MIN_FRAME_LEN(64),
.PTP_TS_EN(1'b0),
.PTP_TD_EN(1'b0),
.PTP_TS_FMT_TOD(1'b1),
@@ -610,6 +608,7 @@ end else begin : sfp_mac
.stat_tx_pkt_vlan(),
.stat_tx_pkt_good(),
.stat_tx_pkt_bad(),
.stat_tx_pad_frame(),
.stat_tx_err_oversize(),
.stat_tx_err_user(),
.stat_tx_err_underflow(),
@@ -656,10 +655,12 @@ end else begin : sfp_mac
/*
* Configuration
*/
.cfg_tx_max_pkt_len('{2{16'd9218}}),
.cfg_tx_pad_en('{2{1'b1}}),
.cfg_tx_min_pkt_len('{2{8'd60-1}}),
.cfg_tx_max_pkt_len('{2{16'd9218-1}}),
.cfg_tx_ifg('{2{8'd12}}),
.cfg_tx_enable('{2{1'b1}}),
.cfg_rx_max_pkt_len('{2{16'd9218}}),
.cfg_rx_max_pkt_len('{2{16'd9218-1}}),
.cfg_rx_enable('{2{1'b1}}),
.cfg_tx_prbs31_enable('{2{1'b0}}),
.cfg_rx_prbs31_enable('{2{1'b0}}),

9
src/eth/example/ZCU111/fpga/rtl/fpga_core.sv
View File

@@ -379,9 +379,7 @@ taxi_eth_mac_25g_us #(
// MAC/PHY config
.COMBINED_MAC_PCS(COMBINED_MAC_PCS),
.DATA_W(MAC_DATA_W),
.PADDING_EN(1'b1),
.DIC_EN(1'b1),
.MIN_FRAME_LEN(64),
.PTP_TS_EN(1'b0),
.PTP_TD_EN(1'b0),
.PTP_TS_FMT_TOD(1'b1),
@@ -516,6 +514,7 @@ sfp_mac_inst (
.stat_tx_pkt_vlan(),
.stat_tx_pkt_good(),
.stat_tx_pkt_bad(),
.stat_tx_pad_frame(),
.stat_tx_err_oversize(),
.stat_tx_err_user(),
.stat_tx_err_underflow(),
@@ -562,10 +561,12 @@ sfp_mac_inst (
/*
* Configuration
*/
.cfg_tx_max_pkt_len('{4{16'd9218}}),
.cfg_tx_pad_en('{4{1'b1}}),
.cfg_tx_min_pkt_len('{4{8'd60-1}}),
.cfg_tx_max_pkt_len('{4{16'd9218-1}}),
.cfg_tx_ifg('{4{8'd12}}),
.cfg_tx_enable('{4{1'b1}}),
.cfg_rx_max_pkt_len('{4{16'd9218}}),
.cfg_rx_max_pkt_len('{4{16'd9218-1}}),
.cfg_rx_enable('{4{1'b1}}),
.cfg_tx_prbs31_enable('{4{1'b0}}),
.cfg_rx_prbs31_enable('{4{1'b0}}),

9
src/eth/example/fb2CG/fpga/rtl/fpga_core.sv
View File

@@ -219,9 +219,7 @@ for (genvar n = 0; n < 2; n = n + 1) begin : gt_quad
// MAC/PHY config
.COMBINED_MAC_PCS(COMBINED_MAC_PCS),
.DATA_W(MAC_DATA_W),
.PADDING_EN(1'b1),
.DIC_EN(1'b1),
.MIN_FRAME_LEN(64),
.PTP_TS_EN(1'b0),
.PTP_TD_EN(1'b0),
.PTP_TS_FMT_TOD(1'b1),
@@ -350,6 +348,7 @@ for (genvar n = 0; n < 2; n = n + 1) begin : gt_quad
.stat_tx_pkt_vlan(),
.stat_tx_pkt_good(),
.stat_tx_pkt_bad(),
.stat_tx_pad_frame(),
.stat_tx_err_oversize(),
.stat_tx_err_user(),
.stat_tx_err_underflow(),
@@ -396,10 +395,12 @@ for (genvar n = 0; n < 2; n = n + 1) begin : gt_quad
/*
* Configuration
*/
.cfg_tx_max_pkt_len('{CNT{16'd9218}}),
.cfg_tx_pad_en('{CNT{1'b1}}),
.cfg_tx_min_pkt_len('{CNT{8'd60-1}}),
.cfg_tx_max_pkt_len('{CNT{16'd9218-1}}),
.cfg_tx_ifg('{CNT{8'd12}}),
.cfg_tx_enable('{CNT{1'b1}}),
.cfg_rx_max_pkt_len('{CNT{16'd9218}}),
.cfg_rx_max_pkt_len('{CNT{16'd9218-1}}),
.cfg_rx_enable('{CNT{1'b1}}),
.cfg_tx_prbs31_enable('{CNT{1'b0}}),
.cfg_rx_prbs31_enable('{CNT{1'b0}}),