From 49be66654553d658fe91754aa70dd12cbcc495ba Mon Sep 17 00:00:00 2001 From: Alex Forencich Date: Thu, 13 Aug 2026 22:18:28 -0700 Subject: [PATCH] cndm_proto: Add some missing resets Signed-off-by: Alex Forencich --- src/cndm_proto/rtl/cndm_proto_rx.sv | 6 ++++++ src/cndm_proto/rtl/cndm_proto_tx.sv | 6 ++++++ 2 files changed, 12 insertions(+) diff --git a/src/cndm_proto/rtl/cndm_proto_rx.sv b/src/cndm_proto/rtl/cndm_proto_rx.sv index cdbd28e..14ac097 100644 --- a/src/cndm_proto/rtl/cndm_proto_rx.sv +++ b/src/cndm_proto/rtl/cndm_proto_rx.sv @@ -170,6 +170,12 @@ always_ff @(posedge clk) begin if (rst) begin state_reg <= STATE_IDLE; + + desc_req_reg <= 1'b0; + axis_desc.tready <= 1'b0; + dma_wr_desc_req.req_valid <= 1'b0; + dma_desc.req_valid <= 1'b0; + axis_cpl.tvalid <= 1'b0; end end diff --git a/src/cndm_proto/rtl/cndm_proto_tx.sv b/src/cndm_proto/rtl/cndm_proto_tx.sv index f7d8133..f3110a8 100644 --- a/src/cndm_proto/rtl/cndm_proto_tx.sv +++ b/src/cndm_proto/rtl/cndm_proto_tx.sv @@ -164,6 +164,12 @@ always_ff @(posedge clk) begin if (rst) begin state_reg <= STATE_IDLE; + + desc_req_reg <= 1'b0; + axis_desc.tready <= 1'b0; + dma_rd_desc_req.req_valid <= 1'b0; + dma_desc.req_valid <= 1'b0; + axis_cpl.tvalid <= 1'b0; end end