eth: Add Ethernet example design for VC709

Signed-off-by: Alex Forencich <alex@alexforencich.com>
This commit is contained in:
Alex Forencich
2025-11-08 16:06:12 -08:00
parent 2d061a76f2
commit 4dbfc4d388
12 changed files with 2291 additions and 0 deletions

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@@ -172,6 +172,7 @@ Example designs are provided for several different FPGA boards, showcasing many
* Xilinx KC705 (Xilinx Kintex 7 XC7K325T)
* Xilinx KCU105 (Xilinx Kintex UltraScale XCKU040)
* Xilinx Kria KR260 (Xilinx Kria K26 SoM / Zynq UltraScale+ XCK26)
* Xilinx VC709 (Xilinx Virtex 7 XC7V690T)
* Xilinx VCU108 (Xilinx Virtex UltraScale XCVU095)
* Xilinx VCU118 (Xilinx Virtex UltraScale+ XCVU9P)
* Xilinx VCU1525 (Xilinx Virtex UltraScale+ XCVU9P)