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lfsr: Add tests for PCIe gen 3 scrambler

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Signed-off-by: Alex Forencich <alex@alexforencich.com>
This commit is contained in:
Alex Forencich
2025-06-10 23:56:55 -07:00
parent e36ac879f7
commit 4e7e39828b
2 changed files with 44 additions and 0 deletions
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22
src/lfsr/tb/taxi_lfsr_descramble/test_taxi_lfsr_descramble.py
View File

@@ -90,6 +90,21 @@ def scramble_pcie(data, state=0xffff, poly=0x9c00):
return data_out
def scramble_pcie_gen3(data, state=0x1efedc, poly=0x524042):
data_out = bytearray()
for d in data:
b = 0
for i in range(8):
if state & 1:
state = (state >> 1) ^ poly
b = b | (1 << i)
else:
state = state >> 1
print(hex(state), hex(b))
data_out.append(b ^ d)
return data_out
async def run_test_descramble(dut, ref_scramble, ref_descramble):
data_width = len(dut.data_in)
@@ -144,6 +159,11 @@ if cocotb.SIM_NAME:
factory.add_option(("ref_scramble", "ref_descramble"), [(scramble_pcie, scramble_pcie)])
factory.generate_tests()
if cocotb.top.LFSR_POLY.value == 0x210125:
factory = TestFactory(run_test_descramble)
factory.add_option(("ref_scramble", "ref_descramble"), [(scramble_pcie_gen3, scramble_pcie_gen3)])
factory.generate_tests()
# cocotb-test
@@ -169,6 +189,8 @@ def process_f_files(files):
(58, "58'h8000000001", "'1", 0, 1, 64, 1),
(16, "16'h0039", "'1", 1, 1, 8, 0),
(16, "16'h0039", "'1", 1, 1, 64, 0),
(23, "23'h210125", "23'h1efedc", 1, 1, 8, 0),
(23, "23'h210125", "23'h1efedc", 1, 1, 64, 0),
])
def test_taxi_lfsr_descramble(request, lfsr_w, lfsr_poly, lfsr_init, lfsr_galois, reverse, data_w, self_sync):
dut = "taxi_lfsr_descramble"

22
src/lfsr/tb/taxi_lfsr_scramble/test_taxi_lfsr_scramble.py
View File

@@ -78,6 +78,21 @@ def scramble_pcie(data, state=0xffff, poly=0x9c00):
return data_out
def scramble_pcie_gen3(data, state=0x1efedc, poly=0x524042):
data_out = bytearray()
for d in data:
b = 0
for i in range(8):
if state & 1:
state = (state >> 1) ^ poly
b = b | (1 << i)
else:
state = state >> 1
print(hex(state), hex(b))
data_out.append(b ^ d)
return data_out
async def run_test_scramble(dut, ref_scramble):
data_width = len(dut.data_in)
@@ -127,6 +142,11 @@ if cocotb.SIM_NAME:
factory.add_option("ref_scramble", [scramble_pcie])
factory.generate_tests()
if cocotb.top.LFSR_POLY.value == 0x210125:
factory = TestFactory(run_test_scramble)
factory.add_option("ref_scramble", [scramble_pcie_gen3])
factory.generate_tests()
# cocotb-test
@@ -152,6 +172,8 @@ def process_f_files(files):
(58, "58'h8000000001", "'1", 0, 1, 64, 1),
(16, "16'h0039", "'1", 1, 1, 8, 0),
(16, "16'h0039", "'1", 1, 1, 64, 0),
(23, "23'h210125", "23'h1efedc", 1, 1, 8, 0),
(23, "23'h210125", "23'h1efedc", 1, 1, 64, 0),
])
def test_taxi_lfsr_scramble(request, lfsr_w, lfsr_poly, lfsr_init, lfsr_galois, reverse, data_w, self_sync):
dut = "taxi_lfsr_scramble"