From 4fc8baea96ff8db5b9e66178754ac8e3de31e814 Mon Sep 17 00:00:00 2001
From: Alex Forencich <alex@alexforencich.com>
Date: Thu, 13 Nov 2025 18:06:33 -0800
Subject: [PATCH] eth: Update example designs for APB interface

Signed-off-by: Alex Forencich <alex@alexforencich.com>
---
 .../ADM_PCIE_9V3/fpga/rtl/fpga_core.sv        | 11 ++++++
 .../example/AS02MC04/fpga/rtl/fpga_core.sv    | 11 ++++++
 .../example/Alveo/fpga/fpga_AU200/Makefile    |  1 +
 .../Alveo/fpga/fpga_AU200_10g/Makefile        |  1 +
 .../example/Alveo/fpga/fpga_AU250/Makefile    |  1 +
 .../Alveo/fpga/fpga_AU250_10g/Makefile        |  1 +
 .../example/Alveo/fpga/fpga_AU280/Makefile    |  1 +
 .../Alveo/fpga/fpga_AU280_10g/Makefile        |  1 +
 .../example/Alveo/fpga/fpga_AU45N/Makefile    |  1 +
 .../Alveo/fpga/fpga_AU45N_10g/Makefile        |  1 +
 src/eth/example/Alveo/fpga/fpga_AU50/Makefile |  1 +
 .../example/Alveo/fpga/fpga_AU50_10g/Makefile |  1 +
 .../example/Alveo/fpga/fpga_AU55C/Makefile    |  1 +
 .../Alveo/fpga/fpga_AU55C_10g/Makefile        |  1 +
 .../example/Alveo/fpga/fpga_AU55N/Makefile    |  1 +
 .../Alveo/fpga/fpga_AU55N_10g/Makefile        |  1 +
 .../example/Alveo/fpga/fpga_VCU1525/Makefile  |  1 +
 .../Alveo/fpga/fpga_VCU1525_10g/Makefile      |  1 +
 .../example/Alveo/fpga/fpga_X3522/Makefile    |  1 +
 .../Alveo/fpga/fpga_X3522_10g/Makefile        |  1 +
 src/eth/example/Alveo/fpga/rtl/fpga_core.sv   | 34 ++++++++++++++++++-
 .../example/Alveo/fpga/tb/fpga_core/Makefile  |  1 +
 .../Alveo/fpga/tb/fpga_core/test_fpga_core.py |  1 +
 .../HTG9200/fpga/fpga_10g_6q_vu13p/Makefile   |  3 +-
 .../HTG9200/fpga/fpga_10g_6q_vu9p/Makefile    |  3 +-
 .../HTG9200/fpga/fpga_10g_vu13p/Makefile      |  3 +-
 .../HTG9200/fpga/fpga_10g_vu9p/Makefile       |  3 +-
 .../HTG9200/fpga/fpga_6q_vu13p/Makefile       |  3 +-
 .../HTG9200/fpga/fpga_6q_vu9p/Makefile        |  3 +-
 .../example/HTG9200/fpga/fpga_vu13p/Makefile  |  3 +-
 .../example/HTG9200/fpga/fpga_vu9p/Makefile   |  3 +-
 src/eth/example/HTG9200/fpga/rtl/fpga_core.sv | 34 ++++++++++++++++++-
 .../HTG9200/fpga/tb/fpga_core/Makefile        |  3 +-
 .../fpga/tb/fpga_core/test_fpga_core.py       |  3 +-
 .../HTG_ZRF8/fpga/fpga_10g_EM_ZU48DR/Makefile |  3 +-
 .../HTG_ZRF8/fpga/fpga_10g_R2_ZU48DR/Makefile |  3 +-
 .../HTG_ZRF8/fpga/fpga_EM_ZU48DR/Makefile     |  3 +-
 .../HTG_ZRF8/fpga/fpga_R2_ZU48DR/Makefile     |  3 +-
 .../example/HTG_ZRF8/fpga/rtl/fpga_core.sv    | 34 ++++++++++++++++++-
 .../HTG_ZRF8/fpga/tb/fpga_core/Makefile       |  3 +-
 .../fpga/tb/fpga_core/test_fpga_core.py       |  3 +-
 .../example/KC705/fpga_10g/fpga_gmii/Makefile |  1 +
 .../KC705/fpga_10g/fpga_rgmii/Makefile        |  1 +
 .../example/KC705/fpga_10g/rtl/fpga_core.sv   | 32 ++++++++++++++++-
 .../KC705/fpga_10g/tb/fpga_core/Makefile      |  1 +
 .../fpga_10g/tb/fpga_core/test_fpga_core.py   |  1 +
 src/eth/example/KCU105/fpga/fpga_10g/Makefile |  1 +
 src/eth/example/KCU105/fpga/rtl/fpga_core.sv  | 34 ++++++++++++++++++-
 .../example/KCU105/fpga/tb/fpga_core/Makefile |  1 +
 .../fpga/tb/fpga_core/test_fpga_core.py       |  1 +
 src/eth/example/KR260/fpga/rtl/fpga_core.sv   | 11 ++++++
 .../example/NetFPGA_SUME/fpga/fpga/Makefile   |  1 +
 .../NetFPGA_SUME/fpga/rtl/fpga_core.sv        | 32 ++++++++++++++++-
 .../NetFPGA_SUME/fpga/tb/fpga_core/Makefile   |  1 +
 .../fpga/tb/fpga_core/test_fpga_core.py       |  1 +
 .../example/Nexus_K3P_Q/fpga/rtl/fpga_core.sv | 11 ++++++
 .../example/Nexus_K3P_S/fpga/rtl/fpga_core.sv | 11 ++++++
 src/eth/example/VC709/fpga/fpga/Makefile      |  1 +
 src/eth/example/VC709/fpga/rtl/fpga_core.sv   | 32 ++++++++++++++++-
 .../example/VC709/fpga/tb/fpga_core/Makefile  |  1 +
 .../VC709/fpga/tb/fpga_core/test_fpga_core.py |  1 +
 src/eth/example/VCU108/fpga/fpga/Makefile     |  1 +
 src/eth/example/VCU108/fpga/fpga_10g/Makefile |  1 +
 src/eth/example/VCU108/fpga/rtl/fpga_core.sv  | 34 ++++++++++++++++++-
 .../example/VCU108/fpga/tb/fpga_core/Makefile |  1 +
 .../fpga/tb/fpga_core/test_fpga_core.py       |  1 +
 src/eth/example/VCU118/fpga/fpga/Makefile     |  1 +
 src/eth/example/VCU118/fpga/fpga_10g/Makefile |  1 +
 src/eth/example/VCU118/fpga/rtl/fpga_core.sv  | 34 ++++++++++++++++++-
 .../example/VCU118/fpga/tb/fpga_core/Makefile |  1 +
 .../fpga/tb/fpga_core/test_fpga_core.py       |  1 +
 .../example/XUPP3R/fpga/fpga_XUPP3R/Makefile  |  1 +
 .../XUPP3R/fpga/fpga_XUPP3R_10g/Makefile      |  1 +
 .../example/XUPP3R/fpga/fpga_XUSP3S/Makefile  |  1 +
 .../XUPP3R/fpga/fpga_XUSP3S_10g/Makefile      |  1 +
 src/eth/example/XUPP3R/fpga/rtl/fpga_core.sv  | 34 ++++++++++++++++++-
 .../example/XUPP3R/fpga/tb/fpga_core/Makefile |  1 +
 .../fpga/tb/fpga_core/test_fpga_core.py       |  1 +
 src/eth/example/ZCU102/fpga/fpga_10g/Makefile |  2 +-
 src/eth/example/ZCU102/fpga/rtl/fpga_core.sv  | 34 ++++++++++++++++++-
 .../example/ZCU102/fpga/tb/fpga_core/Makefile |  1 +
 .../fpga/tb/fpga_core/test_fpga_core.py       |  1 +
 src/eth/example/ZCU106/fpga/fpga_10g/Makefile |  2 +-
 .../example/ZCU106/fpga/fpga_10g_64/Makefile  |  2 +-
 .../ZCU106/fpga/fpga_10g_64_async/Makefile    |  2 +-
 .../ZCU106/fpga/fpga_10g_64_split/Makefile    |  2 +-
 .../fpga/fpga_10g_64_split_async/Makefile     |  2 +-
 .../ZCU106/fpga/fpga_10g_async/Makefile       |  2 +-
 .../ZCU106/fpga/fpga_10g_split/Makefile       |  2 +-
 .../ZCU106/fpga/fpga_10g_split_async/Makefile |  2 +-
 src/eth/example/ZCU106/fpga/rtl/fpga_core.sv  | 34 ++++++++++++++++++-
 .../example/ZCU106/fpga/tb/fpga_core/Makefile |  1 +
 .../fpga/tb/fpga_core/test_fpga_core.py       |  1 +
 src/eth/example/ZCU111/fpga/fpga/Makefile     |  3 +-
 src/eth/example/ZCU111/fpga/fpga_10g/Makefile |  3 +-
 src/eth/example/ZCU111/fpga/rtl/fpga_core.sv  | 34 ++++++++++++++++++-
 .../example/ZCU111/fpga/tb/fpga_core/Makefile |  1 +
 .../fpga/tb/fpga_core/test_fpga_core.py       |  1 +
 src/eth/example/fb2CG/fpga/rtl/fpga_core.sv   | 11 ++++++
 99 files changed, 587 insertions(+), 40 deletions(-)

diff --git a/src/eth/example/ADM_PCIE_9V3/fpga/rtl/fpga_core.sv b/src/eth/example/ADM_PCIE_9V3/fpga/rtl/fpga_core.sv
index 27cbd1b..1263eb1 100644
--- a/src/eth/example/ADM_PCIE_9V3/fpga/rtl/fpga_core.sv
+++ b/src/eth/example/ADM_PCIE_9V3/fpga/rtl/fpga_core.sv
@@ -150,6 +150,12 @@ for (genvar n = 0; n < 2; n = n + 1) begin : gty_quad
 
     localparam CNT = 4;
 
+    taxi_apb_if #(
+        .ADDR_W(18),
+        .DATA_W(16)
+    )
+    gt_apb_ctrl();
+
     taxi_eth_mac_25g_us #(
         .SIM(SIM),
         .VENDOR(VENDOR),
@@ -182,6 +188,11 @@ for (genvar n = 0; n < 2; n = n + 1) begin : gty_quad
         .xcvr_ctrl_clk(clk_125mhz),
         .xcvr_ctrl_rst(qsfp_rst),
 
+        /*
+         * Transceiver control
+         */
+        .s_apb_ctrl(gt_apb_ctrl),
+
         /*
          * Common
          */
diff --git a/src/eth/example/AS02MC04/fpga/rtl/fpga_core.sv b/src/eth/example/AS02MC04/fpga/rtl/fpga_core.sv
index 36790b6..b0c69d5 100644
--- a/src/eth/example/AS02MC04/fpga/rtl/fpga_core.sv
+++ b/src/eth/example/AS02MC04/fpga/rtl/fpga_core.sv
@@ -147,6 +147,12 @@ sfp_sync_reset_inst (
     .out(sfp_rst)
 );
 
+taxi_apb_if #(
+    .ADDR_W(18),
+    .DATA_W(16)
+)
+gt_apb_ctrl();
+
 taxi_eth_mac_25g_us #(
     .SIM(SIM),
     .VENDOR(VENDOR),
@@ -183,6 +189,11 @@ sfp_mac_inst (
     .xcvr_ctrl_clk(clk_125mhz),
     .xcvr_ctrl_rst(sfp_rst),
 
+    /*
+     * Transceiver control
+     */
+    .s_apb_ctrl(gt_apb_ctrl),
+
     /*
      * Common
      */
diff --git a/src/eth/example/Alveo/fpga/fpga_AU200/Makefile b/src/eth/example/Alveo/fpga/fpga_AU200/Makefile
index a001d9b..d1521b5 100644
--- a/src/eth/example/Alveo/fpga/fpga_AU200/Makefile
+++ b/src/eth/example/Alveo/fpga/fpga_AU200/Makefile
@@ -21,6 +21,7 @@ SYN_FILES += $(RTL_DIR)/fpga_core.sv
 SYN_FILES += $(TAXI_SRC_DIR)/eth/rtl/us/taxi_eth_mac_25g_us.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_if_uart.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_switch.sv
+SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_apb.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_stats.f
 SYN_FILES += $(TAXI_SRC_DIR)/axis/rtl/taxi_axis_async_fifo.f
 SYN_FILES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_reset.sv
diff --git a/src/eth/example/Alveo/fpga/fpga_AU200_10g/Makefile b/src/eth/example/Alveo/fpga/fpga_AU200_10g/Makefile
index bcff29f..6aefc61 100644
--- a/src/eth/example/Alveo/fpga/fpga_AU200_10g/Makefile
+++ b/src/eth/example/Alveo/fpga/fpga_AU200_10g/Makefile
@@ -21,6 +21,7 @@ SYN_FILES += $(RTL_DIR)/fpga_core.sv
 SYN_FILES += $(TAXI_SRC_DIR)/eth/rtl/us/taxi_eth_mac_25g_us.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_if_uart.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_switch.sv
+SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_apb.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_stats.f
 SYN_FILES += $(TAXI_SRC_DIR)/axis/rtl/taxi_axis_async_fifo.f
 SYN_FILES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_reset.sv
diff --git a/src/eth/example/Alveo/fpga/fpga_AU250/Makefile b/src/eth/example/Alveo/fpga/fpga_AU250/Makefile
index a339755..481e73e 100644
--- a/src/eth/example/Alveo/fpga/fpga_AU250/Makefile
+++ b/src/eth/example/Alveo/fpga/fpga_AU250/Makefile
@@ -21,6 +21,7 @@ SYN_FILES += $(RTL_DIR)/fpga_core.sv
 SYN_FILES += $(TAXI_SRC_DIR)/eth/rtl/us/taxi_eth_mac_25g_us.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_if_uart.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_switch.sv
+SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_apb.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_stats.f
 SYN_FILES += $(TAXI_SRC_DIR)/axis/rtl/taxi_axis_async_fifo.f
 SYN_FILES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_reset.sv
diff --git a/src/eth/example/Alveo/fpga/fpga_AU250_10g/Makefile b/src/eth/example/Alveo/fpga/fpga_AU250_10g/Makefile
index 67a60b5..8069fc4 100644
--- a/src/eth/example/Alveo/fpga/fpga_AU250_10g/Makefile
+++ b/src/eth/example/Alveo/fpga/fpga_AU250_10g/Makefile
@@ -21,6 +21,7 @@ SYN_FILES += $(RTL_DIR)/fpga_core.sv
 SYN_FILES += $(TAXI_SRC_DIR)/eth/rtl/us/taxi_eth_mac_25g_us.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_if_uart.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_switch.sv
+SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_apb.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_stats.f
 SYN_FILES += $(TAXI_SRC_DIR)/axis/rtl/taxi_axis_async_fifo.f
 SYN_FILES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_reset.sv
diff --git a/src/eth/example/Alveo/fpga/fpga_AU280/Makefile b/src/eth/example/Alveo/fpga/fpga_AU280/Makefile
index fa93db3..9536b42 100644
--- a/src/eth/example/Alveo/fpga/fpga_AU280/Makefile
+++ b/src/eth/example/Alveo/fpga/fpga_AU280/Makefile
@@ -21,6 +21,7 @@ SYN_FILES += $(RTL_DIR)/fpga_core.sv
 SYN_FILES += $(TAXI_SRC_DIR)/eth/rtl/us/taxi_eth_mac_25g_us.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_if_uart.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_switch.sv
+SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_apb.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_stats.f
 SYN_FILES += $(TAXI_SRC_DIR)/axis/rtl/taxi_axis_async_fifo.f
 SYN_FILES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_reset.sv
diff --git a/src/eth/example/Alveo/fpga/fpga_AU280_10g/Makefile b/src/eth/example/Alveo/fpga/fpga_AU280_10g/Makefile
index 5f3bcd7..4f7d131 100644
--- a/src/eth/example/Alveo/fpga/fpga_AU280_10g/Makefile
+++ b/src/eth/example/Alveo/fpga/fpga_AU280_10g/Makefile
@@ -21,6 +21,7 @@ SYN_FILES += $(RTL_DIR)/fpga_core.sv
 SYN_FILES += $(TAXI_SRC_DIR)/eth/rtl/us/taxi_eth_mac_25g_us.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_if_uart.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_switch.sv
+SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_apb.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_stats.f
 SYN_FILES += $(TAXI_SRC_DIR)/axis/rtl/taxi_axis_async_fifo.f
 SYN_FILES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_reset.sv
diff --git a/src/eth/example/Alveo/fpga/fpga_AU45N/Makefile b/src/eth/example/Alveo/fpga/fpga_AU45N/Makefile
index 712aaf9..71fac96 100644
--- a/src/eth/example/Alveo/fpga/fpga_AU45N/Makefile
+++ b/src/eth/example/Alveo/fpga/fpga_AU45N/Makefile
@@ -21,6 +21,7 @@ SYN_FILES += $(RTL_DIR)/fpga_core.sv
 SYN_FILES += $(TAXI_SRC_DIR)/eth/rtl/us/taxi_eth_mac_25g_us.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_if_uart.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_switch.sv
+SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_apb.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_stats.f
 SYN_FILES += $(TAXI_SRC_DIR)/axis/rtl/taxi_axis_async_fifo.f
 SYN_FILES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_reset.sv
diff --git a/src/eth/example/Alveo/fpga/fpga_AU45N_10g/Makefile b/src/eth/example/Alveo/fpga/fpga_AU45N_10g/Makefile
index baa16ca..ad22026 100644
--- a/src/eth/example/Alveo/fpga/fpga_AU45N_10g/Makefile
+++ b/src/eth/example/Alveo/fpga/fpga_AU45N_10g/Makefile
@@ -21,6 +21,7 @@ SYN_FILES += $(RTL_DIR)/fpga_core.sv
 SYN_FILES += $(TAXI_SRC_DIR)/eth/rtl/us/taxi_eth_mac_25g_us.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_if_uart.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_switch.sv
+SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_apb.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_stats.f
 SYN_FILES += $(TAXI_SRC_DIR)/axis/rtl/taxi_axis_async_fifo.f
 SYN_FILES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_reset.sv
diff --git a/src/eth/example/Alveo/fpga/fpga_AU50/Makefile b/src/eth/example/Alveo/fpga/fpga_AU50/Makefile
index 585ca0d..e6ec6c7 100644
--- a/src/eth/example/Alveo/fpga/fpga_AU50/Makefile
+++ b/src/eth/example/Alveo/fpga/fpga_AU50/Makefile
@@ -21,6 +21,7 @@ SYN_FILES += $(RTL_DIR)/fpga_core.sv
 SYN_FILES += $(TAXI_SRC_DIR)/eth/rtl/us/taxi_eth_mac_25g_us.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_if_uart.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_switch.sv
+SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_apb.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_stats.f
 SYN_FILES += $(TAXI_SRC_DIR)/axis/rtl/taxi_axis_async_fifo.f
 SYN_FILES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_reset.sv
diff --git a/src/eth/example/Alveo/fpga/fpga_AU50_10g/Makefile b/src/eth/example/Alveo/fpga/fpga_AU50_10g/Makefile
index e874758..21addca 100644
--- a/src/eth/example/Alveo/fpga/fpga_AU50_10g/Makefile
+++ b/src/eth/example/Alveo/fpga/fpga_AU50_10g/Makefile
@@ -21,6 +21,7 @@ SYN_FILES += $(RTL_DIR)/fpga_core.sv
 SYN_FILES += $(TAXI_SRC_DIR)/eth/rtl/us/taxi_eth_mac_25g_us.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_if_uart.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_switch.sv
+SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_apb.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_stats.f
 SYN_FILES += $(TAXI_SRC_DIR)/axis/rtl/taxi_axis_async_fifo.f
 SYN_FILES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_reset.sv
diff --git a/src/eth/example/Alveo/fpga/fpga_AU55C/Makefile b/src/eth/example/Alveo/fpga/fpga_AU55C/Makefile
index 085bb45..57d0e35 100644
--- a/src/eth/example/Alveo/fpga/fpga_AU55C/Makefile
+++ b/src/eth/example/Alveo/fpga/fpga_AU55C/Makefile
@@ -21,6 +21,7 @@ SYN_FILES += $(RTL_DIR)/fpga_core.sv
 SYN_FILES += $(TAXI_SRC_DIR)/eth/rtl/us/taxi_eth_mac_25g_us.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_if_uart.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_switch.sv
+SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_apb.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_stats.f
 SYN_FILES += $(TAXI_SRC_DIR)/axis/rtl/taxi_axis_async_fifo.f
 SYN_FILES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_reset.sv
diff --git a/src/eth/example/Alveo/fpga/fpga_AU55C_10g/Makefile b/src/eth/example/Alveo/fpga/fpga_AU55C_10g/Makefile
index 04d2e06..777e00d 100644
--- a/src/eth/example/Alveo/fpga/fpga_AU55C_10g/Makefile
+++ b/src/eth/example/Alveo/fpga/fpga_AU55C_10g/Makefile
@@ -21,6 +21,7 @@ SYN_FILES += $(RTL_DIR)/fpga_core.sv
 SYN_FILES += $(TAXI_SRC_DIR)/eth/rtl/us/taxi_eth_mac_25g_us.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_if_uart.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_switch.sv
+SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_apb.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_stats.f
 SYN_FILES += $(TAXI_SRC_DIR)/axis/rtl/taxi_axis_async_fifo.f
 SYN_FILES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_reset.sv
diff --git a/src/eth/example/Alveo/fpga/fpga_AU55N/Makefile b/src/eth/example/Alveo/fpga/fpga_AU55N/Makefile
index 655d2f0..d80b873 100644
--- a/src/eth/example/Alveo/fpga/fpga_AU55N/Makefile
+++ b/src/eth/example/Alveo/fpga/fpga_AU55N/Makefile
@@ -21,6 +21,7 @@ SYN_FILES += $(RTL_DIR)/fpga_core.sv
 SYN_FILES += $(TAXI_SRC_DIR)/eth/rtl/us/taxi_eth_mac_25g_us.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_if_uart.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_switch.sv
+SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_apb.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_stats.f
 SYN_FILES += $(TAXI_SRC_DIR)/axis/rtl/taxi_axis_async_fifo.f
 SYN_FILES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_reset.sv
diff --git a/src/eth/example/Alveo/fpga/fpga_AU55N_10g/Makefile b/src/eth/example/Alveo/fpga/fpga_AU55N_10g/Makefile
index 8f3114d..738e5d8 100644
--- a/src/eth/example/Alveo/fpga/fpga_AU55N_10g/Makefile
+++ b/src/eth/example/Alveo/fpga/fpga_AU55N_10g/Makefile
@@ -21,6 +21,7 @@ SYN_FILES += $(RTL_DIR)/fpga_core.sv
 SYN_FILES += $(TAXI_SRC_DIR)/eth/rtl/us/taxi_eth_mac_25g_us.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_if_uart.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_switch.sv
+SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_apb.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_stats.f
 SYN_FILES += $(TAXI_SRC_DIR)/axis/rtl/taxi_axis_async_fifo.f
 SYN_FILES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_reset.sv
diff --git a/src/eth/example/Alveo/fpga/fpga_VCU1525/Makefile b/src/eth/example/Alveo/fpga/fpga_VCU1525/Makefile
index 07beb0f..b43a9fb 100644
--- a/src/eth/example/Alveo/fpga/fpga_VCU1525/Makefile
+++ b/src/eth/example/Alveo/fpga/fpga_VCU1525/Makefile
@@ -21,6 +21,7 @@ SYN_FILES += $(RTL_DIR)/fpga_core.sv
 SYN_FILES += $(TAXI_SRC_DIR)/eth/rtl/us/taxi_eth_mac_25g_us.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_if_uart.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_switch.sv
+SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_apb.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_stats.f
 SYN_FILES += $(TAXI_SRC_DIR)/axis/rtl/taxi_axis_async_fifo.f
 SYN_FILES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_reset.sv
diff --git a/src/eth/example/Alveo/fpga/fpga_VCU1525_10g/Makefile b/src/eth/example/Alveo/fpga/fpga_VCU1525_10g/Makefile
index 3644cc2..1ebd3fe 100644
--- a/src/eth/example/Alveo/fpga/fpga_VCU1525_10g/Makefile
+++ b/src/eth/example/Alveo/fpga/fpga_VCU1525_10g/Makefile
@@ -21,6 +21,7 @@ SYN_FILES += $(RTL_DIR)/fpga_core.sv
 SYN_FILES += $(TAXI_SRC_DIR)/eth/rtl/us/taxi_eth_mac_25g_us.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_if_uart.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_switch.sv
+SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_apb.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_stats.f
 SYN_FILES += $(TAXI_SRC_DIR)/axis/rtl/taxi_axis_async_fifo.f
 SYN_FILES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_reset.sv
diff --git a/src/eth/example/Alveo/fpga/fpga_X3522/Makefile b/src/eth/example/Alveo/fpga/fpga_X3522/Makefile
index e9e515c..215e3c1 100644
--- a/src/eth/example/Alveo/fpga/fpga_X3522/Makefile
+++ b/src/eth/example/Alveo/fpga/fpga_X3522/Makefile
@@ -21,6 +21,7 @@ SYN_FILES += $(RTL_DIR)/fpga_core.sv
 SYN_FILES += $(TAXI_SRC_DIR)/eth/rtl/us/taxi_eth_mac_25g_us.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_if_uart.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_switch.sv
+SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_apb.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_stats.f
 SYN_FILES += $(TAXI_SRC_DIR)/axis/rtl/taxi_axis_async_fifo.f
 SYN_FILES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_reset.sv
diff --git a/src/eth/example/Alveo/fpga/fpga_X3522_10g/Makefile b/src/eth/example/Alveo/fpga/fpga_X3522_10g/Makefile
index 40bbd74..a6f0f59 100644
--- a/src/eth/example/Alveo/fpga/fpga_X3522_10g/Makefile
+++ b/src/eth/example/Alveo/fpga/fpga_X3522_10g/Makefile
@@ -21,6 +21,7 @@ SYN_FILES += $(RTL_DIR)/fpga_core.sv
 SYN_FILES += $(TAXI_SRC_DIR)/eth/rtl/us/taxi_eth_mac_25g_us.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_if_uart.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_switch.sv
+SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_apb.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_stats.f
 SYN_FILES += $(TAXI_SRC_DIR)/axis/rtl/taxi_axis_async_fifo.f
 SYN_FILES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_reset.sv
diff --git a/src/eth/example/Alveo/fpga/rtl/fpga_core.sv b/src/eth/example/Alveo/fpga/rtl/fpga_core.sv
index 1236102..d0b58c8 100644
--- a/src/eth/example/Alveo/fpga/rtl/fpga_core.sv
+++ b/src/eth/example/Alveo/fpga/rtl/fpga_core.sv
@@ -109,7 +109,9 @@ xfcp_if_uart_inst (
     .prescale(16'(125000000/3000000))
 );
 
-taxi_axis_if #(.DATA_W(8), .USER_EN(1), .USER_W(1)) xfcp_sw_ds[1](), xfcp_sw_us[1]();
+localparam XFCP_PORTS = 1+GTY_QUAD_CNT;
+
+taxi_axis_if #(.DATA_W(8), .USER_EN(1), .USER_W(1)) xfcp_sw_ds[XFCP_PORTS](), xfcp_sw_us[XFCP_PORTS]();
 
 taxi_xfcp_switch #(
     .XFCP_ID_STR("Alveo"),
@@ -300,6 +302,31 @@ for (genvar n = 0; n < GTY_QUAD_CNT; n = n + 1) begin : gty_quad
     localparam CLK = n;
     localparam CNT = 4;
 
+    taxi_apb_if #(
+        .ADDR_W(18),
+        .DATA_W(16)
+    )
+    gt_apb_ctrl();
+
+    taxi_xfcp_mod_apb #(
+        .XFCP_EXT_ID_STR("GTY CTRL")
+    )
+    xfcp_mod_apb_inst (
+        .clk(clk_125mhz),
+        .rst(rst_125mhz),
+
+        /*
+         * XFCP upstream port
+         */
+        .xfcp_usp_ds(xfcp_sw_ds[n+1]),
+        .xfcp_usp_us(xfcp_sw_us[n+1]),
+
+        /*
+         * APB master interface
+         */
+        .m_apb(gt_apb_ctrl)
+    );
+
     taxi_eth_mac_25g_us #(
         .SIM(SIM),
         .VENDOR(VENDOR),
@@ -338,6 +365,11 @@ for (genvar n = 0; n < GTY_QUAD_CNT; n = n + 1) begin : gty_quad
         .xcvr_ctrl_clk(clk_125mhz),
         .xcvr_ctrl_rst(eth_gty_rst[CLK]),
 
+        /*
+         * Transceiver control
+         */
+        .s_apb_ctrl(gt_apb_ctrl),
+
         /*
          * Common
          */
diff --git a/src/eth/example/Alveo/fpga/tb/fpga_core/Makefile b/src/eth/example/Alveo/fpga/tb/fpga_core/Makefile
index 5f303d5..12dfa58 100644
--- a/src/eth/example/Alveo/fpga/tb/fpga_core/Makefile
+++ b/src/eth/example/Alveo/fpga/tb/fpga_core/Makefile
@@ -26,6 +26,7 @@ VERILOG_SOURCES += $(RTL_DIR)/$(DUT).sv
 VERILOG_SOURCES += $(TAXI_SRC_DIR)/eth/rtl/us/taxi_eth_mac_25g_us.f
 VERILOG_SOURCES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_if_uart.f
 VERILOG_SOURCES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_switch.sv
+VERILOG_SOURCES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_apb.f
 VERILOG_SOURCES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_stats.f
 VERILOG_SOURCES += $(TAXI_SRC_DIR)/axis/rtl/taxi_axis_async_fifo.f
 VERILOG_SOURCES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_reset.sv
diff --git a/src/eth/example/Alveo/fpga/tb/fpga_core/test_fpga_core.py b/src/eth/example/Alveo/fpga/tb/fpga_core/test_fpga_core.py
index a30fded..c078a8c 100644
--- a/src/eth/example/Alveo/fpga/tb/fpga_core/test_fpga_core.py
+++ b/src/eth/example/Alveo/fpga/tb/fpga_core/test_fpga_core.py
@@ -214,6 +214,7 @@ def test_fpga_core(request):
         os.path.join(taxi_src_dir, "eth", "rtl", "us", "taxi_eth_mac_25g_us.f"),
         os.path.join(taxi_src_dir, "xfcp", "rtl", "taxi_xfcp_if_uart.f"),
         os.path.join(taxi_src_dir, "xfcp", "rtl", "taxi_xfcp_switch.sv"),
+        os.path.join(taxi_src_dir, "xfcp", "rtl", "taxi_xfcp_mod_apb.f"),
         os.path.join(taxi_src_dir, "xfcp", "rtl", "taxi_xfcp_mod_stats.f"),
         os.path.join(taxi_src_dir, "axis", "rtl", "taxi_axis_async_fifo.f"),
         os.path.join(taxi_src_dir, "sync", "rtl", "taxi_sync_reset.sv"),
diff --git a/src/eth/example/HTG9200/fpga/fpga_10g_6q_vu13p/Makefile b/src/eth/example/HTG9200/fpga/fpga_10g_6q_vu13p/Makefile
index 6e1001e..e1c3d07 100644
--- a/src/eth/example/HTG9200/fpga/fpga_10g_6q_vu13p/Makefile
+++ b/src/eth/example/HTG9200/fpga/fpga_10g_6q_vu13p/Makefile
@@ -22,8 +22,9 @@ SYN_FILES += $(RTL_DIR)/../pll/si5341_i2c_init_6qsfp.sv
 SYN_FILES += $(TAXI_SRC_DIR)/eth/rtl/us/taxi_eth_mac_25g_us.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_if_uart.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_switch.sv
-SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_stats.f
+SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_apb.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_i2c_master.f
+SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_stats.f
 SYN_FILES += $(TAXI_SRC_DIR)/axis/rtl/taxi_axis_async_fifo.f
 SYN_FILES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_reset.sv
 SYN_FILES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_signal.sv
diff --git a/src/eth/example/HTG9200/fpga/fpga_10g_6q_vu9p/Makefile b/src/eth/example/HTG9200/fpga/fpga_10g_6q_vu9p/Makefile
index dbd6683..4b7d44a 100644
--- a/src/eth/example/HTG9200/fpga/fpga_10g_6q_vu9p/Makefile
+++ b/src/eth/example/HTG9200/fpga/fpga_10g_6q_vu9p/Makefile
@@ -22,8 +22,9 @@ SYN_FILES += $(RTL_DIR)/../pll/si5341_i2c_init_6qsfp.sv
 SYN_FILES += $(TAXI_SRC_DIR)/eth/rtl/us/taxi_eth_mac_25g_us.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_if_uart.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_switch.sv
-SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_stats.f
+SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_apb.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_i2c_master.f
+SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_stats.f
 SYN_FILES += $(TAXI_SRC_DIR)/axis/rtl/taxi_axis_async_fifo.f
 SYN_FILES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_reset.sv
 SYN_FILES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_signal.sv
diff --git a/src/eth/example/HTG9200/fpga/fpga_10g_vu13p/Makefile b/src/eth/example/HTG9200/fpga/fpga_10g_vu13p/Makefile
index 84a0d39..5c0dcd4 100644
--- a/src/eth/example/HTG9200/fpga/fpga_10g_vu13p/Makefile
+++ b/src/eth/example/HTG9200/fpga/fpga_10g_vu13p/Makefile
@@ -22,8 +22,9 @@ SYN_FILES += $(RTL_DIR)/../pll/si5341_i2c_init.sv
 SYN_FILES += $(TAXI_SRC_DIR)/eth/rtl/us/taxi_eth_mac_25g_us.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_if_uart.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_switch.sv
-SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_stats.f
+SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_apb.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_i2c_master.f
+SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_stats.f
 SYN_FILES += $(TAXI_SRC_DIR)/axis/rtl/taxi_axis_async_fifo.f
 SYN_FILES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_reset.sv
 SYN_FILES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_signal.sv
diff --git a/src/eth/example/HTG9200/fpga/fpga_10g_vu9p/Makefile b/src/eth/example/HTG9200/fpga/fpga_10g_vu9p/Makefile
index f7780cb..2df656a 100644
--- a/src/eth/example/HTG9200/fpga/fpga_10g_vu9p/Makefile
+++ b/src/eth/example/HTG9200/fpga/fpga_10g_vu9p/Makefile
@@ -22,8 +22,9 @@ SYN_FILES += $(RTL_DIR)/../pll/si5341_i2c_init.sv
 SYN_FILES += $(TAXI_SRC_DIR)/eth/rtl/us/taxi_eth_mac_25g_us.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_if_uart.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_switch.sv
-SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_stats.f
+SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_apb.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_i2c_master.f
+SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_stats.f
 SYN_FILES += $(TAXI_SRC_DIR)/axis/rtl/taxi_axis_async_fifo.f
 SYN_FILES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_reset.sv
 SYN_FILES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_signal.sv
diff --git a/src/eth/example/HTG9200/fpga/fpga_6q_vu13p/Makefile b/src/eth/example/HTG9200/fpga/fpga_6q_vu13p/Makefile
index 9943e5b..41408a8 100644
--- a/src/eth/example/HTG9200/fpga/fpga_6q_vu13p/Makefile
+++ b/src/eth/example/HTG9200/fpga/fpga_6q_vu13p/Makefile
@@ -22,8 +22,9 @@ SYN_FILES += $(RTL_DIR)/../pll/si5341_i2c_init_6qsfp.sv
 SYN_FILES += $(TAXI_SRC_DIR)/eth/rtl/us/taxi_eth_mac_25g_us.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_if_uart.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_switch.sv
-SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_stats.f
+SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_apb.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_i2c_master.f
+SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_stats.f
 SYN_FILES += $(TAXI_SRC_DIR)/axis/rtl/taxi_axis_async_fifo.f
 SYN_FILES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_reset.sv
 SYN_FILES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_signal.sv
diff --git a/src/eth/example/HTG9200/fpga/fpga_6q_vu9p/Makefile b/src/eth/example/HTG9200/fpga/fpga_6q_vu9p/Makefile
index 1235992..74200ad 100644
--- a/src/eth/example/HTG9200/fpga/fpga_6q_vu9p/Makefile
+++ b/src/eth/example/HTG9200/fpga/fpga_6q_vu9p/Makefile
@@ -22,8 +22,9 @@ SYN_FILES += $(RTL_DIR)/../pll/si5341_i2c_init_6qsfp.sv
 SYN_FILES += $(TAXI_SRC_DIR)/eth/rtl/us/taxi_eth_mac_25g_us.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_if_uart.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_switch.sv
-SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_stats.f
+SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_apb.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_i2c_master.f
+SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_stats.f
 SYN_FILES += $(TAXI_SRC_DIR)/axis/rtl/taxi_axis_async_fifo.f
 SYN_FILES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_reset.sv
 SYN_FILES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_signal.sv
diff --git a/src/eth/example/HTG9200/fpga/fpga_vu13p/Makefile b/src/eth/example/HTG9200/fpga/fpga_vu13p/Makefile
index 72bad1b..bd47335 100644
--- a/src/eth/example/HTG9200/fpga/fpga_vu13p/Makefile
+++ b/src/eth/example/HTG9200/fpga/fpga_vu13p/Makefile
@@ -22,8 +22,9 @@ SYN_FILES += $(RTL_DIR)/../pll/si5341_i2c_init.sv
 SYN_FILES += $(TAXI_SRC_DIR)/eth/rtl/us/taxi_eth_mac_25g_us.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_if_uart.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_switch.sv
-SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_stats.f
+SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_apb.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_i2c_master.f
+SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_stats.f
 SYN_FILES += $(TAXI_SRC_DIR)/axis/rtl/taxi_axis_async_fifo.f
 SYN_FILES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_reset.sv
 SYN_FILES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_signal.sv
diff --git a/src/eth/example/HTG9200/fpga/fpga_vu9p/Makefile b/src/eth/example/HTG9200/fpga/fpga_vu9p/Makefile
index 6a4dec6..2fb8187 100644
--- a/src/eth/example/HTG9200/fpga/fpga_vu9p/Makefile
+++ b/src/eth/example/HTG9200/fpga/fpga_vu9p/Makefile
@@ -22,8 +22,9 @@ SYN_FILES += $(RTL_DIR)/../pll/si5341_i2c_init.sv
 SYN_FILES += $(TAXI_SRC_DIR)/eth/rtl/us/taxi_eth_mac_25g_us.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_if_uart.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_switch.sv
-SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_stats.f
+SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_apb.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_i2c_master.f
+SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_stats.f
 SYN_FILES += $(TAXI_SRC_DIR)/axis/rtl/taxi_axis_async_fifo.f
 SYN_FILES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_reset.sv
 SYN_FILES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_signal.sv
diff --git a/src/eth/example/HTG9200/fpga/rtl/fpga_core.sv b/src/eth/example/HTG9200/fpga/rtl/fpga_core.sv
index 4abf8e4..cf84942 100644
--- a/src/eth/example/HTG9200/fpga/rtl/fpga_core.sv
+++ b/src/eth/example/HTG9200/fpga/rtl/fpga_core.sv
@@ -198,7 +198,9 @@ xfcp_if_uart_inst (
     .prescale(16'(125000000/921600))
 );
 
-taxi_axis_if #(.DATA_W(8), .USER_EN(1), .USER_W(1)) xfcp_sw_ds[2](), xfcp_sw_us[2]();
+localparam XFCP_PORTS = 2+GTY_QUAD_CNT;
+
+taxi_axis_if #(.DATA_W(8), .USER_EN(1), .USER_W(1)) xfcp_sw_ds[XFCP_PORTS](), xfcp_sw_us[XFCP_PORTS]();
 
 taxi_xfcp_switch #(
     .XFCP_ID_STR("HTG-9200"),
@@ -381,6 +383,31 @@ for (genvar n = 0; n < GTY_QUAD_CNT; n = n + 1) begin : gty_quad
     localparam CLK = n;
     localparam CNT = 4;
 
+    taxi_apb_if #(
+        .ADDR_W(18),
+        .DATA_W(16)
+    )
+    gt_apb_ctrl();
+
+    taxi_xfcp_mod_apb #(
+        .XFCP_EXT_ID_STR("GTY CTRL")
+    )
+    xfcp_mod_apb_inst (
+        .clk(clk_125mhz),
+        .rst(rst_125mhz),
+
+        /*
+         * XFCP upstream port
+         */
+        .xfcp_usp_ds(xfcp_sw_ds[n+2]),
+        .xfcp_usp_us(xfcp_sw_us[n+2]),
+
+        /*
+         * APB master interface
+         */
+        .m_apb(gt_apb_ctrl)
+    );
+
     taxi_eth_mac_25g_us #(
         .SIM(SIM),
         .VENDOR(VENDOR),
@@ -435,6 +462,11 @@ for (genvar n = 0; n < GTY_QUAD_CNT; n = n + 1) begin : gty_quad
         .xcvr_ctrl_clk(clk_125mhz),
         .xcvr_ctrl_rst(eth_gty_rst[CLK]),
 
+        /*
+         * Transceiver control
+         */
+        .s_apb_ctrl(gt_apb_ctrl),
+
         /*
          * Common
          */
diff --git a/src/eth/example/HTG9200/fpga/tb/fpga_core/Makefile b/src/eth/example/HTG9200/fpga/tb/fpga_core/Makefile
index 5bf00a9..cd62dc8 100644
--- a/src/eth/example/HTG9200/fpga/tb/fpga_core/Makefile
+++ b/src/eth/example/HTG9200/fpga/tb/fpga_core/Makefile
@@ -27,8 +27,9 @@ VERILOG_SOURCES += $(RTL_DIR)/../pll/si5341_i2c_init.sv
 VERILOG_SOURCES += $(TAXI_SRC_DIR)/eth/rtl/us/taxi_eth_mac_25g_us.f
 VERILOG_SOURCES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_if_uart.f
 VERILOG_SOURCES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_switch.sv
-VERILOG_SOURCES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_stats.f
+VERILOG_SOURCES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_apb.f
 VERILOG_SOURCES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_i2c_master.f
+VERILOG_SOURCES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_stats.f
 VERILOG_SOURCES += $(TAXI_SRC_DIR)/axis/rtl/taxi_axis_async_fifo.f
 VERILOG_SOURCES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_reset.sv
 VERILOG_SOURCES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_signal.sv
diff --git a/src/eth/example/HTG9200/fpga/tb/fpga_core/test_fpga_core.py b/src/eth/example/HTG9200/fpga/tb/fpga_core/test_fpga_core.py
index 9b581fa..704d841 100644
--- a/src/eth/example/HTG9200/fpga/tb/fpga_core/test_fpga_core.py
+++ b/src/eth/example/HTG9200/fpga/tb/fpga_core/test_fpga_core.py
@@ -220,8 +220,9 @@ def test_fpga_core(request, mac_data_w):
         os.path.join(taxi_src_dir, "eth", "rtl", "us", "taxi_eth_mac_25g_us.f"),
         os.path.join(taxi_src_dir, "xfcp", "rtl", "taxi_xfcp_if_uart.f"),
         os.path.join(taxi_src_dir, "xfcp", "rtl", "taxi_xfcp_switch.sv"),
-        os.path.join(taxi_src_dir, "xfcp", "rtl", "taxi_xfcp_mod_stats.f"),
+        os.path.join(taxi_src_dir, "xfcp", "rtl", "taxi_xfcp_mod_apb.f"),
         os.path.join(taxi_src_dir, "xfcp", "rtl", "taxi_xfcp_mod_i2c_master.f"),
+        os.path.join(taxi_src_dir, "xfcp", "rtl", "taxi_xfcp_mod_stats.f"),
         os.path.join(taxi_src_dir, "axis", "rtl", "taxi_axis_async_fifo.f"),
         os.path.join(taxi_src_dir, "sync", "rtl", "taxi_sync_reset.sv"),
         os.path.join(taxi_src_dir, "sync", "rtl", "taxi_sync_signal.sv"),
diff --git a/src/eth/example/HTG_ZRF8/fpga/fpga_10g_EM_ZU48DR/Makefile b/src/eth/example/HTG_ZRF8/fpga/fpga_10g_EM_ZU48DR/Makefile
index 79ca292..a82b1ab 100644
--- a/src/eth/example/HTG_ZRF8/fpga/fpga_10g_EM_ZU48DR/Makefile
+++ b/src/eth/example/HTG_ZRF8/fpga/fpga_10g_EM_ZU48DR/Makefile
@@ -22,8 +22,9 @@ SYN_FILES += $(RTL_DIR)/../pll/pll_i2c_init_em.sv
 SYN_FILES += $(TAXI_SRC_DIR)/eth/rtl/us/taxi_eth_mac_25g_us.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_if_uart.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_switch.sv
-SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_stats.f
+SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_apb.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_i2c_master.f
+SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_stats.f
 SYN_FILES += $(TAXI_SRC_DIR)/axis/rtl/taxi_axis_async_fifo.f
 SYN_FILES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_reset.sv
 SYN_FILES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_signal.sv
diff --git a/src/eth/example/HTG_ZRF8/fpga/fpga_10g_R2_ZU48DR/Makefile b/src/eth/example/HTG_ZRF8/fpga/fpga_10g_R2_ZU48DR/Makefile
index 87b3538..f15e095 100644
--- a/src/eth/example/HTG_ZRF8/fpga/fpga_10g_R2_ZU48DR/Makefile
+++ b/src/eth/example/HTG_ZRF8/fpga/fpga_10g_R2_ZU48DR/Makefile
@@ -22,8 +22,9 @@ SYN_FILES += $(RTL_DIR)/../pll/pll_i2c_init_r2.sv
 SYN_FILES += $(TAXI_SRC_DIR)/eth/rtl/us/taxi_eth_mac_25g_us.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_if_uart.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_switch.sv
-SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_stats.f
+SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_apb.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_i2c_master.f
+SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_stats.f
 SYN_FILES += $(TAXI_SRC_DIR)/axis/rtl/taxi_axis_async_fifo.f
 SYN_FILES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_reset.sv
 SYN_FILES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_signal.sv
diff --git a/src/eth/example/HTG_ZRF8/fpga/fpga_EM_ZU48DR/Makefile b/src/eth/example/HTG_ZRF8/fpga/fpga_EM_ZU48DR/Makefile
index 551e651..4eba801 100644
--- a/src/eth/example/HTG_ZRF8/fpga/fpga_EM_ZU48DR/Makefile
+++ b/src/eth/example/HTG_ZRF8/fpga/fpga_EM_ZU48DR/Makefile
@@ -22,8 +22,9 @@ SYN_FILES += $(RTL_DIR)/../pll/pll_i2c_init_em.sv
 SYN_FILES += $(TAXI_SRC_DIR)/eth/rtl/us/taxi_eth_mac_25g_us.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_if_uart.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_switch.sv
-SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_stats.f
+SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_apb.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_i2c_master.f
+SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_stats.f
 SYN_FILES += $(TAXI_SRC_DIR)/axis/rtl/taxi_axis_async_fifo.f
 SYN_FILES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_reset.sv
 SYN_FILES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_signal.sv
diff --git a/src/eth/example/HTG_ZRF8/fpga/fpga_R2_ZU48DR/Makefile b/src/eth/example/HTG_ZRF8/fpga/fpga_R2_ZU48DR/Makefile
index 867d97a..1d40d24 100644
--- a/src/eth/example/HTG_ZRF8/fpga/fpga_R2_ZU48DR/Makefile
+++ b/src/eth/example/HTG_ZRF8/fpga/fpga_R2_ZU48DR/Makefile
@@ -22,8 +22,9 @@ SYN_FILES += $(RTL_DIR)/../pll/pll_i2c_init_r2.sv
 SYN_FILES += $(TAXI_SRC_DIR)/eth/rtl/us/taxi_eth_mac_25g_us.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_if_uart.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_switch.sv
-SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_stats.f
+SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_apb.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_i2c_master.f
+SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_stats.f
 SYN_FILES += $(TAXI_SRC_DIR)/axis/rtl/taxi_axis_async_fifo.f
 SYN_FILES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_reset.sv
 SYN_FILES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_signal.sv
diff --git a/src/eth/example/HTG_ZRF8/fpga/rtl/fpga_core.sv b/src/eth/example/HTG_ZRF8/fpga/rtl/fpga_core.sv
index 3d46e9f..755fe19 100644
--- a/src/eth/example/HTG_ZRF8/fpga/rtl/fpga_core.sv
+++ b/src/eth/example/HTG_ZRF8/fpga/rtl/fpga_core.sv
@@ -131,7 +131,9 @@ xfcp_if_uart_inst (
     .prescale(16'(125000000/921600))
 );
 
-taxi_axis_if #(.DATA_W(8), .USER_EN(1), .USER_W(1)) xfcp_sw_ds[3](), xfcp_sw_us[3]();
+localparam XFCP_PORTS = 3+GTY_QUAD_CNT;
+
+taxi_axis_if #(.DATA_W(8), .USER_EN(1), .USER_W(1)) xfcp_sw_ds[XFCP_PORTS](), xfcp_sw_us[XFCP_PORTS]();
 
 taxi_xfcp_switch #(
     .XFCP_ID_STR("HTG-ZRF8"),
@@ -325,6 +327,31 @@ for (genvar n = 0; n < GTY_QUAD_CNT; n = n + 1) begin : gty_quad
     localparam CLK = n;
     localparam CNT = 4;
 
+    taxi_apb_if #(
+        .ADDR_W(18),
+        .DATA_W(16)
+    )
+    gt_apb_ctrl();
+
+    taxi_xfcp_mod_apb #(
+        .XFCP_EXT_ID_STR("GTY CTRL")
+    )
+    xfcp_mod_apb_inst (
+        .clk(clk_125mhz),
+        .rst(rst_125mhz),
+
+        /*
+         * XFCP upstream port
+         */
+        .xfcp_usp_ds(xfcp_sw_ds[n+3]),
+        .xfcp_usp_us(xfcp_sw_us[n+3]),
+
+        /*
+         * APB master interface
+         */
+        .m_apb(gt_apb_ctrl)
+    );
+
     taxi_eth_mac_25g_us #(
         .SIM(SIM),
         .VENDOR(VENDOR),
@@ -366,6 +393,11 @@ for (genvar n = 0; n < GTY_QUAD_CNT; n = n + 1) begin : gty_quad
         .xcvr_ctrl_clk(clk_125mhz),
         .xcvr_ctrl_rst(eth_gty_rst[CLK]),
 
+        /*
+         * Transceiver control
+         */
+        .s_apb_ctrl(gt_apb_ctrl),
+
         /*
          * Common
          */
diff --git a/src/eth/example/HTG_ZRF8/fpga/tb/fpga_core/Makefile b/src/eth/example/HTG_ZRF8/fpga/tb/fpga_core/Makefile
index d0db379..3cc33d9 100644
--- a/src/eth/example/HTG_ZRF8/fpga/tb/fpga_core/Makefile
+++ b/src/eth/example/HTG_ZRF8/fpga/tb/fpga_core/Makefile
@@ -27,8 +27,9 @@ VERILOG_SOURCES += $(RTL_DIR)/$(DUT).sv
 VERILOG_SOURCES += $(TAXI_SRC_DIR)/eth/rtl/us/taxi_eth_mac_25g_us.f
 VERILOG_SOURCES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_if_uart.f
 VERILOG_SOURCES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_switch.sv
-VERILOG_SOURCES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_stats.f
+VERILOG_SOURCES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_apb.f
 VERILOG_SOURCES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_i2c_master.f
+VERILOG_SOURCES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_stats.f
 VERILOG_SOURCES += $(TAXI_SRC_DIR)/axis/rtl/taxi_axis_async_fifo.f
 VERILOG_SOURCES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_reset.sv
 VERILOG_SOURCES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_signal.sv
diff --git a/src/eth/example/HTG_ZRF8/fpga/tb/fpga_core/test_fpga_core.py b/src/eth/example/HTG_ZRF8/fpga/tb/fpga_core/test_fpga_core.py
index d7e147e..ac6e67a 100644
--- a/src/eth/example/HTG_ZRF8/fpga/tb/fpga_core/test_fpga_core.py
+++ b/src/eth/example/HTG_ZRF8/fpga/tb/fpga_core/test_fpga_core.py
@@ -226,8 +226,9 @@ def test_fpga_core(request, mac_data_w):
         os.path.join(taxi_src_dir, "eth", "rtl", "us", "taxi_eth_mac_25g_us.f"),
         os.path.join(taxi_src_dir, "xfcp", "rtl", "taxi_xfcp_if_uart.f"),
         os.path.join(taxi_src_dir, "xfcp", "rtl", "taxi_xfcp_switch.sv"),
-        os.path.join(taxi_src_dir, "xfcp", "rtl", "taxi_xfcp_mod_stats.f"),
+        os.path.join(taxi_src_dir, "xfcp", "rtl", "taxi_xfcp_mod_apb.f"),
         os.path.join(taxi_src_dir, "xfcp", "rtl", "taxi_xfcp_mod_i2c_master.f"),
+        os.path.join(taxi_src_dir, "xfcp", "rtl", "taxi_xfcp_mod_stats.f"),
         os.path.join(taxi_src_dir, "axis", "rtl", "taxi_axis_async_fifo.f"),
         os.path.join(taxi_src_dir, "sync", "rtl", "taxi_sync_reset.sv"),
         os.path.join(taxi_src_dir, "sync", "rtl", "taxi_sync_signal.sv"),
diff --git a/src/eth/example/KC705/fpga_10g/fpga_gmii/Makefile b/src/eth/example/KC705/fpga_10g/fpga_gmii/Makefile
index 81e8eea..f82e5dc 100644
--- a/src/eth/example/KC705/fpga_10g/fpga_gmii/Makefile
+++ b/src/eth/example/KC705/fpga_10g/fpga_gmii/Makefile
@@ -23,6 +23,7 @@ SYN_FILES += $(TAXI_SRC_DIR)/eth/rtl/us/taxi_eth_mac_25g_us.f
 SYN_FILES += $(TAXI_SRC_DIR)/eth/rtl/taxi_eth_mac_1g_gmii_fifo.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_if_uart.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_switch.sv
+SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_apb.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_i2c_master.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_stats.f
 SYN_FILES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_reset.sv
diff --git a/src/eth/example/KC705/fpga_10g/fpga_rgmii/Makefile b/src/eth/example/KC705/fpga_10g/fpga_rgmii/Makefile
index 40614de..4a0d2ab 100644
--- a/src/eth/example/KC705/fpga_10g/fpga_rgmii/Makefile
+++ b/src/eth/example/KC705/fpga_10g/fpga_rgmii/Makefile
@@ -23,6 +23,7 @@ SYN_FILES += $(TAXI_SRC_DIR)/eth/rtl/taxi_eth_mac_1g_fifo.f
 SYN_FILES += $(TAXI_SRC_DIR)/eth/rtl/taxi_eth_mac_1g_rgmii_fifo.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_if_uart.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_switch.sv
+SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_apb.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_i2c_master.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_stats.f
 SYN_FILES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_reset.sv
diff --git a/src/eth/example/KC705/fpga_10g/rtl/fpga_core.sv b/src/eth/example/KC705/fpga_10g/rtl/fpga_core.sv
index 5f756f2..bf4a5d7 100644
--- a/src/eth/example/KC705/fpga_10g/rtl/fpga_core.sv
+++ b/src/eth/example/KC705/fpga_10g/rtl/fpga_core.sv
@@ -139,7 +139,7 @@ xfcp_if_uart_inst (
     .prescale(16'(125000000/921600))
 );
 
-taxi_axis_if #(.DATA_W(8), .USER_EN(1), .USER_W(1)) xfcp_sw_ds[2](), xfcp_sw_us[2]();
+taxi_axis_if #(.DATA_W(8), .USER_EN(1), .USER_W(1)) xfcp_sw_ds[3](), xfcp_sw_us[3]();
 
 taxi_xfcp_switch #(
     .XFCP_ID_STR("KC705"),
@@ -472,6 +472,31 @@ assign sfp_tx_n = sfp_tx_n_int[0];
 `define SIM
 // synthesis translate_on
 
+taxi_apb_if #(
+    .ADDR_W(18),
+    .DATA_W(16)
+)
+gt_apb_ctrl();
+
+taxi_xfcp_mod_apb #(
+    .XFCP_EXT_ID_STR("GTX CTRL")
+)
+xfcp_mod_apb_inst (
+    .clk(clk),
+    .rst(rst),
+
+    /*
+     * XFCP upstream port
+     */
+    .xfcp_usp_ds(xfcp_sw_ds[2]),
+    .xfcp_usp_us(xfcp_sw_us[2]),
+
+    /*
+     * APB master interface
+     */
+    .m_apb(gt_apb_ctrl)
+);
+
 taxi_eth_mac_25g_us #(
     .SIM(SIM),
     .VENDOR(VENDOR),
@@ -522,6 +547,11 @@ sfp_mac_inst (
     .xcvr_ctrl_clk(clk),
     .xcvr_ctrl_rst(sfp_rst),
 
+    /*
+     * Transceiver control
+     */
+    .s_apb_ctrl(gt_apb_ctrl),
+
     /*
      * Common
      */
diff --git a/src/eth/example/KC705/fpga_10g/tb/fpga_core/Makefile b/src/eth/example/KC705/fpga_10g/tb/fpga_core/Makefile
index c9c783e..07a237d 100644
--- a/src/eth/example/KC705/fpga_10g/tb/fpga_core/Makefile
+++ b/src/eth/example/KC705/fpga_10g/tb/fpga_core/Makefile
@@ -28,6 +28,7 @@ VERILOG_SOURCES += $(TAXI_SRC_DIR)/eth/rtl/taxi_eth_mac_1g_gmii_fifo.f
 VERILOG_SOURCES += $(TAXI_SRC_DIR)/eth/rtl/taxi_eth_mac_1g_rgmii_fifo.f
 VERILOG_SOURCES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_if_uart.f
 VERILOG_SOURCES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_switch.sv
+VERILOG_SOURCES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_apb.f
 VERILOG_SOURCES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_i2c_master.f
 VERILOG_SOURCES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_stats.f
 VERILOG_SOURCES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_reset.sv
diff --git a/src/eth/example/KC705/fpga_10g/tb/fpga_core/test_fpga_core.py b/src/eth/example/KC705/fpga_10g/tb/fpga_core/test_fpga_core.py
index 988fc4b..e8addcf 100644
--- a/src/eth/example/KC705/fpga_10g/tb/fpga_core/test_fpga_core.py
+++ b/src/eth/example/KC705/fpga_10g/tb/fpga_core/test_fpga_core.py
@@ -274,6 +274,7 @@ def test_fpga_core(request, phy_type):
         os.path.join(taxi_src_dir, "eth", "rtl", "taxi_eth_mac_1g_rgmii_fifo.f"),
         os.path.join(taxi_src_dir, "xfcp", "rtl", "taxi_xfcp_if_uart.f"),
         os.path.join(taxi_src_dir, "xfcp", "rtl", "taxi_xfcp_switch.sv"),
+        os.path.join(taxi_src_dir, "xfcp", "rtl", "taxi_xfcp_mod_apb.f"),
         os.path.join(taxi_src_dir, "xfcp", "rtl", "taxi_xfcp_mod_i2c_master.f"),
         os.path.join(taxi_src_dir, "xfcp", "rtl", "taxi_xfcp_mod_stats.f"),
         os.path.join(taxi_src_dir, "sync", "rtl", "taxi_sync_reset.sv"),
diff --git a/src/eth/example/KCU105/fpga/fpga_10g/Makefile b/src/eth/example/KCU105/fpga/fpga_10g/Makefile
index 171fdbd..cf174e9 100644
--- a/src/eth/example/KCU105/fpga/fpga_10g/Makefile
+++ b/src/eth/example/KCU105/fpga/fpga_10g/Makefile
@@ -23,6 +23,7 @@ SYN_FILES += $(TAXI_SRC_DIR)/eth/rtl/us/taxi_eth_mac_25g_us.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_if_uart.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_switch.sv
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_i2c_master.f
+SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_apb.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_stats.f
 SYN_FILES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_reset.sv
 SYN_FILES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_signal.sv
diff --git a/src/eth/example/KCU105/fpga/rtl/fpga_core.sv b/src/eth/example/KCU105/fpga/rtl/fpga_core.sv
index 78ceab8..d527823 100644
--- a/src/eth/example/KCU105/fpga/rtl/fpga_core.sv
+++ b/src/eth/example/KCU105/fpga/rtl/fpga_core.sv
@@ -142,7 +142,9 @@ xfcp_if_uart_inst (
     .prescale(16'(125000000/921600))
 );
 
-taxi_axis_if #(.DATA_W(8), .USER_EN(1), .USER_W(1)) xfcp_sw_ds[2](), xfcp_sw_us[2]();
+localparam XFCP_PORTS = SFP_RATE ? 3 : 2;
+
+taxi_axis_if #(.DATA_W(8), .USER_EN(1), .USER_W(1)) xfcp_sw_ds[XFCP_PORTS](), xfcp_sw_us[XFCP_PORTS]();
 
 taxi_xfcp_switch #(
     .XFCP_ID_STR("KCU105"),
@@ -560,6 +562,31 @@ end else begin : sfp_mac
         .out(sfp_rst)
     );
 
+    taxi_apb_if #(
+        .ADDR_W(18),
+        .DATA_W(16)
+    )
+    gt_apb_ctrl();
+
+    taxi_xfcp_mod_apb #(
+        .XFCP_EXT_ID_STR("GTH CTRL")
+    )
+    xfcp_mod_apb_inst (
+        .clk(clk),
+        .rst(rst),
+
+        /*
+         * XFCP upstream port
+         */
+        .xfcp_usp_ds(xfcp_sw_ds[2]),
+        .xfcp_usp_us(xfcp_sw_us[2]),
+
+        /*
+         * APB master interface
+         */
+        .m_apb(gt_apb_ctrl)
+    );
+
     taxi_eth_mac_25g_us #(
         .SIM(SIM),
         .VENDOR(VENDOR),
@@ -598,6 +625,11 @@ end else begin : sfp_mac
         .xcvr_ctrl_clk(clk),
         .xcvr_ctrl_rst(sfp_rst),
 
+        /*
+         * Transceiver control
+         */
+        .s_apb_ctrl(gt_apb_ctrl),
+
         /*
          * Common
          */
diff --git a/src/eth/example/KCU105/fpga/tb/fpga_core/Makefile b/src/eth/example/KCU105/fpga/tb/fpga_core/Makefile
index cda3adf..b75064b 100644
--- a/src/eth/example/KCU105/fpga/tb/fpga_core/Makefile
+++ b/src/eth/example/KCU105/fpga/tb/fpga_core/Makefile
@@ -28,6 +28,7 @@ VERILOG_SOURCES += $(TAXI_SRC_DIR)/eth/rtl/us/taxi_eth_mac_25g_us.f
 VERILOG_SOURCES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_if_uart.f
 VERILOG_SOURCES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_switch.sv
 VERILOG_SOURCES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_i2c_master.f
+VERILOG_SOURCES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_apb.f
 VERILOG_SOURCES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_stats.f
 VERILOG_SOURCES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_reset.sv
 VERILOG_SOURCES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_signal.sv
diff --git a/src/eth/example/KCU105/fpga/tb/fpga_core/test_fpga_core.py b/src/eth/example/KCU105/fpga/tb/fpga_core/test_fpga_core.py
index f5efcde..0b9ef79 100644
--- a/src/eth/example/KCU105/fpga/tb/fpga_core/test_fpga_core.py
+++ b/src/eth/example/KCU105/fpga/tb/fpga_core/test_fpga_core.py
@@ -291,6 +291,7 @@ def test_fpga_core(request, sfp_rate):
         os.path.join(taxi_src_dir, "xfcp", "rtl", "taxi_xfcp_if_uart.f"),
         os.path.join(taxi_src_dir, "xfcp", "rtl", "taxi_xfcp_switch.sv"),
         os.path.join(taxi_src_dir, "xfcp", "rtl", "taxi_xfcp_mod_i2c_master.f"),
+        os.path.join(taxi_src_dir, "xfcp", "rtl", "taxi_xfcp_mod_apb.f"),
         os.path.join(taxi_src_dir, "xfcp", "rtl", "taxi_xfcp_mod_stats.f"),
         os.path.join(taxi_src_dir, "sync", "rtl", "taxi_sync_reset.sv"),
         os.path.join(taxi_src_dir, "sync", "rtl", "taxi_sync_signal.sv"),
diff --git a/src/eth/example/KR260/fpga/rtl/fpga_core.sv b/src/eth/example/KR260/fpga/rtl/fpga_core.sv
index 1052c32..62fdbfb 100644
--- a/src/eth/example/KR260/fpga/rtl/fpga_core.sv
+++ b/src/eth/example/KR260/fpga/rtl/fpga_core.sv
@@ -405,6 +405,12 @@ end else begin : sfp_mac
     assign eth_gty_rx_p[0] = sfp_rx_p;
     assign eth_gty_rx_n[0] = sfp_rx_n;
 
+    taxi_apb_if #(
+        .ADDR_W(18),
+        .DATA_W(16)
+    )
+    gt_apb_ctrl();
+
     taxi_eth_mac_25g_us #(
         .SIM(SIM),
         .VENDOR(VENDOR),
@@ -436,6 +442,11 @@ end else begin : sfp_mac
         .xcvr_ctrl_clk(clk),
         .xcvr_ctrl_rst(sfp_rst),
 
+        /*
+         * Transceiver control
+         */
+        .s_apb_ctrl(gt_apb_ctrl),
+
         /*
          * Common
          */
diff --git a/src/eth/example/NetFPGA_SUME/fpga/fpga/Makefile b/src/eth/example/NetFPGA_SUME/fpga/fpga/Makefile
index e2994dd..ad5bde8 100644
--- a/src/eth/example/NetFPGA_SUME/fpga/fpga/Makefile
+++ b/src/eth/example/NetFPGA_SUME/fpga/fpga/Makefile
@@ -22,6 +22,7 @@ SYN_FILES += $(RTL_DIR)/si5324_i2c_init.sv
 SYN_FILES += $(TAXI_SRC_DIR)/eth/rtl/us/taxi_eth_mac_25g_us.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_if_uart.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_switch.sv
+SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_apb.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_i2c_master.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_stats.f
 SYN_FILES += $(TAXI_SRC_DIR)/axis/rtl/taxi_axis_async_fifo.f
diff --git a/src/eth/example/NetFPGA_SUME/fpga/rtl/fpga_core.sv b/src/eth/example/NetFPGA_SUME/fpga/rtl/fpga_core.sv
index 0d7581e..9625025 100644
--- a/src/eth/example/NetFPGA_SUME/fpga/rtl/fpga_core.sv
+++ b/src/eth/example/NetFPGA_SUME/fpga/rtl/fpga_core.sv
@@ -112,7 +112,7 @@ xfcp_if_uart_inst (
     .prescale(16'(125000000/3000000))
 );
 
-taxi_axis_if #(.DATA_W(8), .USER_EN(1), .USER_W(1)) xfcp_sw_ds[2](), xfcp_sw_us[2]();
+taxi_axis_if #(.DATA_W(8), .USER_EN(1), .USER_W(1)) xfcp_sw_ds[3](), xfcp_sw_us[3]();
 
 taxi_xfcp_switch #(
     .XFCP_ID_STR("NetFPGA SUME"),
@@ -261,6 +261,31 @@ sfp_sync_reset_inst (
     .out(sfp_rst)
 );
 
+taxi_apb_if #(
+    .ADDR_W(18),
+    .DATA_W(16)
+)
+gt_apb_ctrl();
+
+taxi_xfcp_mod_apb #(
+    .XFCP_EXT_ID_STR("GTH CTRL")
+)
+xfcp_mod_apb_inst (
+    .clk(clk_125mhz),
+    .rst(rst_125mhz),
+
+    /*
+     * XFCP upstream port
+     */
+    .xfcp_usp_ds(xfcp_sw_ds[2]),
+    .xfcp_usp_us(xfcp_sw_us[2]),
+
+    /*
+     * APB master interface
+     */
+    .m_apb(gt_apb_ctrl)
+);
+
 taxi_eth_mac_25g_us #(
     .SIM(SIM),
     .VENDOR(VENDOR),
@@ -302,6 +327,11 @@ sfp_mac_inst (
     .xcvr_ctrl_clk(clk_125mhz),
     .xcvr_ctrl_rst(sfp_rst),
 
+    /*
+     * Transceiver control
+     */
+    .s_apb_ctrl(gt_apb_ctrl),
+
     /*
      * Common
      */
diff --git a/src/eth/example/NetFPGA_SUME/fpga/tb/fpga_core/Makefile b/src/eth/example/NetFPGA_SUME/fpga/tb/fpga_core/Makefile
index 4d8c2cd..1df82a0 100644
--- a/src/eth/example/NetFPGA_SUME/fpga/tb/fpga_core/Makefile
+++ b/src/eth/example/NetFPGA_SUME/fpga/tb/fpga_core/Makefile
@@ -27,6 +27,7 @@ VERILOG_SOURCES += $(TAXI_SRC_DIR)/eth/rtl/taxi_eth_mac_1g_fifo.f
 VERILOG_SOURCES += $(TAXI_SRC_DIR)/eth/rtl/us/taxi_eth_mac_25g_us.f
 VERILOG_SOURCES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_if_uart.f
 VERILOG_SOURCES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_switch.sv
+VERILOG_SOURCES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_apb.f
 VERILOG_SOURCES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_i2c_master.f
 VERILOG_SOURCES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_stats.f
 VERILOG_SOURCES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_reset.sv
diff --git a/src/eth/example/NetFPGA_SUME/fpga/tb/fpga_core/test_fpga_core.py b/src/eth/example/NetFPGA_SUME/fpga/tb/fpga_core/test_fpga_core.py
index 0a09d53..b9637ee 100644
--- a/src/eth/example/NetFPGA_SUME/fpga/tb/fpga_core/test_fpga_core.py
+++ b/src/eth/example/NetFPGA_SUME/fpga/tb/fpga_core/test_fpga_core.py
@@ -203,6 +203,7 @@ def test_fpga_core(request, sfp_rate):
         os.path.join(taxi_src_dir, "eth", "rtl", "us", "taxi_eth_mac_25g_us.f"),
         os.path.join(taxi_src_dir, "xfcp", "rtl", "taxi_xfcp_if_uart.f"),
         os.path.join(taxi_src_dir, "xfcp", "rtl", "taxi_xfcp_switch.sv"),
+        os.path.join(taxi_src_dir, "xfcp", "rtl", "taxi_xfcp_mod_apb.f"),
         os.path.join(taxi_src_dir, "xfcp", "rtl", "taxi_xfcp_mod_i2c_master.f"),
         os.path.join(taxi_src_dir, "xfcp", "rtl", "taxi_xfcp_mod_stats.f"),
         os.path.join(taxi_src_dir, "sync", "rtl", "taxi_sync_reset.sv"),
diff --git a/src/eth/example/Nexus_K3P_Q/fpga/rtl/fpga_core.sv b/src/eth/example/Nexus_K3P_Q/fpga/rtl/fpga_core.sv
index 2465c4f..1cd60ff 100644
--- a/src/eth/example/Nexus_K3P_Q/fpga/rtl/fpga_core.sv
+++ b/src/eth/example/Nexus_K3P_Q/fpga/rtl/fpga_core.sv
@@ -165,6 +165,12 @@ for (genvar n = 0; n < 2; n = n + 1) begin : gty_quad
 
     localparam CNT = 4;
 
+    taxi_apb_if #(
+        .ADDR_W(18),
+        .DATA_W(16)
+    )
+    gt_apb_ctrl();
+
     taxi_eth_mac_25g_us #(
         .SIM(SIM),
         .VENDOR(VENDOR),
@@ -201,6 +207,11 @@ for (genvar n = 0; n < 2; n = n + 1) begin : gty_quad
         .xcvr_ctrl_clk(clk_125mhz),
         .xcvr_ctrl_rst(qsfp_rst),
 
+        /*
+         * Transceiver control
+         */
+        .s_apb_ctrl(gt_apb_ctrl),
+
         /*
          * Common
          */
diff --git a/src/eth/example/Nexus_K3P_S/fpga/rtl/fpga_core.sv b/src/eth/example/Nexus_K3P_S/fpga/rtl/fpga_core.sv
index 8cc8b11..510f319 100644
--- a/src/eth/example/Nexus_K3P_S/fpga/rtl/fpga_core.sv
+++ b/src/eth/example/Nexus_K3P_S/fpga/rtl/fpga_core.sv
@@ -141,6 +141,12 @@ sfp_sync_reset_inst (
     .out(sfp_rst)
 );
 
+taxi_apb_if #(
+    .ADDR_W(18),
+    .DATA_W(16)
+)
+gt_apb_ctrl();
+
 taxi_eth_mac_25g_us #(
     .SIM(SIM),
     .VENDOR(VENDOR),
@@ -177,6 +183,11 @@ sfp_mac_inst (
     .xcvr_ctrl_clk(clk_125mhz),
     .xcvr_ctrl_rst(sfp_rst),
 
+    /*
+     * Transceiver control
+     */
+    .s_apb_ctrl(gt_apb_ctrl),
+
     /*
      * Common
      */
diff --git a/src/eth/example/VC709/fpga/fpga/Makefile b/src/eth/example/VC709/fpga/fpga/Makefile
index 54e1c04..5307aa2 100644
--- a/src/eth/example/VC709/fpga/fpga/Makefile
+++ b/src/eth/example/VC709/fpga/fpga/Makefile
@@ -22,6 +22,7 @@ SYN_FILES += $(RTL_DIR)/si5324_i2c_init.sv
 SYN_FILES += $(TAXI_SRC_DIR)/eth/rtl/us/taxi_eth_mac_25g_us.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_if_uart.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_switch.sv
+SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_apb.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_i2c_master.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_stats.f
 SYN_FILES += $(TAXI_SRC_DIR)/axis/rtl/taxi_axis_async_fifo.f
diff --git a/src/eth/example/VC709/fpga/rtl/fpga_core.sv b/src/eth/example/VC709/fpga/rtl/fpga_core.sv
index d820bc3..060a7d4 100644
--- a/src/eth/example/VC709/fpga/rtl/fpga_core.sv
+++ b/src/eth/example/VC709/fpga/rtl/fpga_core.sv
@@ -117,7 +117,7 @@ xfcp_if_uart_inst (
     .prescale(16'(125000000/921600))
 );
 
-taxi_axis_if #(.DATA_W(8), .USER_EN(1), .USER_W(1)) xfcp_sw_ds[2](), xfcp_sw_us[2]();
+taxi_axis_if #(.DATA_W(8), .USER_EN(1), .USER_W(1)) xfcp_sw_ds[3](), xfcp_sw_us[3]();
 
 taxi_xfcp_switch #(
     .XFCP_ID_STR("VC709"),
@@ -266,6 +266,31 @@ sfp_sync_reset_inst (
     .out(sfp_rst)
 );
 
+taxi_apb_if #(
+    .ADDR_W(18),
+    .DATA_W(16)
+)
+gt_apb_ctrl();
+
+taxi_xfcp_mod_apb #(
+    .XFCP_EXT_ID_STR("GTH CTRL")
+)
+xfcp_mod_apb_inst (
+    .clk(clk_125mhz),
+    .rst(rst_125mhz),
+
+    /*
+     * XFCP upstream port
+     */
+    .xfcp_usp_ds(xfcp_sw_ds[2]),
+    .xfcp_usp_us(xfcp_sw_us[2]),
+
+    /*
+     * APB master interface
+     */
+    .m_apb(gt_apb_ctrl)
+);
+
 taxi_eth_mac_25g_us #(
     .SIM(SIM),
     .VENDOR(VENDOR),
@@ -307,6 +332,11 @@ sfp_mac_inst (
     .xcvr_ctrl_clk(clk_125mhz),
     .xcvr_ctrl_rst(sfp_rst),
 
+    /*
+     * Transceiver control
+     */
+    .s_apb_ctrl(gt_apb_ctrl),
+
     /*
      * Common
      */
diff --git a/src/eth/example/VC709/fpga/tb/fpga_core/Makefile b/src/eth/example/VC709/fpga/tb/fpga_core/Makefile
index 4d8c2cd..1df82a0 100644
--- a/src/eth/example/VC709/fpga/tb/fpga_core/Makefile
+++ b/src/eth/example/VC709/fpga/tb/fpga_core/Makefile
@@ -27,6 +27,7 @@ VERILOG_SOURCES += $(TAXI_SRC_DIR)/eth/rtl/taxi_eth_mac_1g_fifo.f
 VERILOG_SOURCES += $(TAXI_SRC_DIR)/eth/rtl/us/taxi_eth_mac_25g_us.f
 VERILOG_SOURCES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_if_uart.f
 VERILOG_SOURCES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_switch.sv
+VERILOG_SOURCES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_apb.f
 VERILOG_SOURCES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_i2c_master.f
 VERILOG_SOURCES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_stats.f
 VERILOG_SOURCES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_reset.sv
diff --git a/src/eth/example/VC709/fpga/tb/fpga_core/test_fpga_core.py b/src/eth/example/VC709/fpga/tb/fpga_core/test_fpga_core.py
index d2b443a..aa483d2 100644
--- a/src/eth/example/VC709/fpga/tb/fpga_core/test_fpga_core.py
+++ b/src/eth/example/VC709/fpga/tb/fpga_core/test_fpga_core.py
@@ -208,6 +208,7 @@ def test_fpga_core(request, sfp_rate):
         os.path.join(taxi_src_dir, "eth", "rtl", "us", "taxi_eth_mac_25g_us.f"),
         os.path.join(taxi_src_dir, "xfcp", "rtl", "taxi_xfcp_if_uart.f"),
         os.path.join(taxi_src_dir, "xfcp", "rtl", "taxi_xfcp_switch.sv"),
+        os.path.join(taxi_src_dir, "xfcp", "rtl", "taxi_xfcp_mod_apb.f"),
         os.path.join(taxi_src_dir, "xfcp", "rtl", "taxi_xfcp_mod_i2c_master.f"),
         os.path.join(taxi_src_dir, "xfcp", "rtl", "taxi_xfcp_mod_stats.f"),
         os.path.join(taxi_src_dir, "sync", "rtl", "taxi_sync_reset.sv"),
diff --git a/src/eth/example/VCU108/fpga/fpga/Makefile b/src/eth/example/VCU108/fpga/fpga/Makefile
index 47939b2..8efa2a9 100644
--- a/src/eth/example/VCU108/fpga/fpga/Makefile
+++ b/src/eth/example/VCU108/fpga/fpga/Makefile
@@ -22,6 +22,7 @@ SYN_FILES += $(TAXI_SRC_DIR)/eth/rtl/taxi_eth_mac_1g_fifo.f
 SYN_FILES += $(TAXI_SRC_DIR)/eth/rtl/us/taxi_eth_mac_25g_us.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_if_uart.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_switch.sv
+SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_apb.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_stats.f
 SYN_FILES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_reset.sv
 SYN_FILES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_signal.sv
diff --git a/src/eth/example/VCU108/fpga/fpga_10g/Makefile b/src/eth/example/VCU108/fpga/fpga_10g/Makefile
index a66ab74..144bba4 100644
--- a/src/eth/example/VCU108/fpga/fpga_10g/Makefile
+++ b/src/eth/example/VCU108/fpga/fpga_10g/Makefile
@@ -22,6 +22,7 @@ SYN_FILES += $(TAXI_SRC_DIR)/eth/rtl/taxi_eth_mac_1g_fifo.f
 SYN_FILES += $(TAXI_SRC_DIR)/eth/rtl/us/taxi_eth_mac_25g_us.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_if_uart.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_switch.sv
+SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_apb.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_stats.f
 SYN_FILES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_reset.sv
 SYN_FILES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_signal.sv
diff --git a/src/eth/example/VCU108/fpga/rtl/fpga_core.sv b/src/eth/example/VCU108/fpga/rtl/fpga_core.sv
index 6c20dfc..40803cd 100644
--- a/src/eth/example/VCU108/fpga/rtl/fpga_core.sv
+++ b/src/eth/example/VCU108/fpga/rtl/fpga_core.sv
@@ -123,7 +123,9 @@ xfcp_if_uart_inst (
     .prescale(16'(125000000/921600))
 );
 
-taxi_axis_if #(.DATA_W(8), .USER_EN(1), .USER_W(1)) xfcp_sw_ds[1](), xfcp_sw_us[1]();
+localparam XFCP_PORTS = 2;
+
+taxi_axis_if #(.DATA_W(8), .USER_EN(1), .USER_W(1)) xfcp_sw_ds[XFCP_PORTS](), xfcp_sw_us[XFCP_PORTS]();
 
 taxi_xfcp_switch #(
     .XFCP_ID_STR("VCU108"),
@@ -355,6 +357,31 @@ qsfp_sync_reset_inst (
     .out(qsfp_rst)
 );
 
+taxi_apb_if #(
+    .ADDR_W(18),
+    .DATA_W(16)
+)
+gt_apb_ctrl();
+
+taxi_xfcp_mod_apb #(
+    .XFCP_EXT_ID_STR("GTY CTRL")
+)
+xfcp_mod_apb_inst (
+    .clk(clk),
+    .rst(rst),
+
+    /*
+     * XFCP upstream port
+     */
+    .xfcp_usp_ds(xfcp_sw_ds[1]),
+    .xfcp_usp_us(xfcp_sw_us[1]),
+
+    /*
+     * APB master interface
+     */
+    .m_apb(gt_apb_ctrl)
+);
+
 taxi_eth_mac_25g_us #(
     .SIM(SIM),
     .VENDOR(VENDOR),
@@ -393,6 +420,11 @@ qsfp_mac_inst (
     .xcvr_ctrl_clk(clk),
     .xcvr_ctrl_rst(qsfp_rst),
 
+    /*
+     * Transceiver control
+     */
+    .s_apb_ctrl(gt_apb_ctrl),
+
     /*
      * Common
      */
diff --git a/src/eth/example/VCU108/fpga/tb/fpga_core/Makefile b/src/eth/example/VCU108/fpga/tb/fpga_core/Makefile
index ac122b6..bf067a8 100644
--- a/src/eth/example/VCU108/fpga/tb/fpga_core/Makefile
+++ b/src/eth/example/VCU108/fpga/tb/fpga_core/Makefile
@@ -26,6 +26,7 @@ VERILOG_SOURCES += $(RTL_DIR)/$(DUT).sv
 VERILOG_SOURCES += $(TAXI_SRC_DIR)/eth/rtl/taxi_eth_mac_1g_fifo.f
 VERILOG_SOURCES += $(TAXI_SRC_DIR)/eth/rtl/us/taxi_eth_mac_25g_us.f
 VERILOG_SOURCES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_if_uart.f
+VERILOG_SOURCES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_apb.sv
 VERILOG_SOURCES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_switch.sv
 VERILOG_SOURCES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_stats.f
 VERILOG_SOURCES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_reset.sv
diff --git a/src/eth/example/VCU108/fpga/tb/fpga_core/test_fpga_core.py b/src/eth/example/VCU108/fpga/tb/fpga_core/test_fpga_core.py
index 314c101..277ca89 100644
--- a/src/eth/example/VCU108/fpga/tb/fpga_core/test_fpga_core.py
+++ b/src/eth/example/VCU108/fpga/tb/fpga_core/test_fpga_core.py
@@ -276,6 +276,7 @@ def test_fpga_core(request, mac_data_w):
         os.path.join(taxi_src_dir, "eth", "rtl", "us", "taxi_eth_mac_25g_us.f"),
         os.path.join(taxi_src_dir, "xfcp", "rtl", "taxi_xfcp_if_uart.f"),
         os.path.join(taxi_src_dir, "xfcp", "rtl", "taxi_xfcp_switch.sv"),
+        os.path.join(taxi_src_dir, "xfcp", "rtl", "taxi_xfcp_mod_apb.f"),
         os.path.join(taxi_src_dir, "xfcp", "rtl", "taxi_xfcp_mod_stats.f"),
         os.path.join(taxi_src_dir, "sync", "rtl", "taxi_sync_reset.sv"),
         os.path.join(taxi_src_dir, "sync", "rtl", "taxi_sync_signal.sv"),
diff --git a/src/eth/example/VCU118/fpga/fpga/Makefile b/src/eth/example/VCU118/fpga/fpga/Makefile
index deae8fa..0983319 100644
--- a/src/eth/example/VCU118/fpga/fpga/Makefile
+++ b/src/eth/example/VCU118/fpga/fpga/Makefile
@@ -22,6 +22,7 @@ SYN_FILES += $(TAXI_SRC_DIR)/eth/rtl/taxi_eth_mac_1g_fifo.f
 SYN_FILES += $(TAXI_SRC_DIR)/eth/rtl/us/taxi_eth_mac_25g_us.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_if_uart.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_switch.sv
+SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_apb.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_stats.f
 SYN_FILES += $(TAXI_SRC_DIR)/lss/rtl/taxi_mdio_master.sv
 SYN_FILES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_reset.sv
diff --git a/src/eth/example/VCU118/fpga/fpga_10g/Makefile b/src/eth/example/VCU118/fpga/fpga_10g/Makefile
index c184a26..c67c83d 100644
--- a/src/eth/example/VCU118/fpga/fpga_10g/Makefile
+++ b/src/eth/example/VCU118/fpga/fpga_10g/Makefile
@@ -22,6 +22,7 @@ SYN_FILES += $(TAXI_SRC_DIR)/eth/rtl/taxi_eth_mac_1g_fifo.f
 SYN_FILES += $(TAXI_SRC_DIR)/eth/rtl/us/taxi_eth_mac_25g_us.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_if_uart.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_switch.sv
+SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_apb.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_stats.f
 SYN_FILES += $(TAXI_SRC_DIR)/lss/rtl/taxi_mdio_master.sv
 SYN_FILES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_reset.sv
diff --git a/src/eth/example/VCU118/fpga/rtl/fpga_core.sv b/src/eth/example/VCU118/fpga/rtl/fpga_core.sv
index 54440fa..7cb9ab7 100644
--- a/src/eth/example/VCU118/fpga/rtl/fpga_core.sv
+++ b/src/eth/example/VCU118/fpga/rtl/fpga_core.sv
@@ -141,7 +141,9 @@ xfcp_if_uart_inst (
     .prescale(16'(125000000/921600))
 );
 
-taxi_axis_if #(.DATA_W(8), .USER_EN(1), .USER_W(1)) xfcp_sw_ds[1](), xfcp_sw_us[1]();
+localparam XFCP_PORTS = 1+2;
+
+taxi_axis_if #(.DATA_W(8), .USER_EN(1), .USER_W(1)) xfcp_sw_ds[XFCP_PORTS](), xfcp_sw_us[XFCP_PORTS]();
 
 taxi_xfcp_switch #(
     .XFCP_ID_STR("VCU118"),
@@ -552,6 +554,31 @@ for (genvar n = 0; n < 2; n = n + 1) begin : gty_quad
 
     localparam CNT = 4;
 
+    taxi_apb_if #(
+        .ADDR_W(18),
+        .DATA_W(16)
+    )
+    gt_apb_ctrl();
+
+    taxi_xfcp_mod_apb #(
+        .XFCP_EXT_ID_STR("GTY CTRL")
+    )
+    xfcp_mod_apb_inst (
+        .clk(clk_125mhz),
+        .rst(rst_125mhz),
+
+        /*
+         * XFCP upstream port
+         */
+        .xfcp_usp_ds(xfcp_sw_ds[n+1]),
+        .xfcp_usp_us(xfcp_sw_us[n+1]),
+
+        /*
+         * APB master interface
+         */
+        .m_apb(gt_apb_ctrl)
+    );
+
     taxi_eth_mac_25g_us #(
         .SIM(SIM),
         .VENDOR(VENDOR),
@@ -590,6 +617,11 @@ for (genvar n = 0; n < 2; n = n + 1) begin : gty_quad
         .xcvr_ctrl_clk(clk_125mhz),
         .xcvr_ctrl_rst(qsfp_rst),
 
+        /*
+         * Transceiver control
+         */
+        .s_apb_ctrl(gt_apb_ctrl),
+
         /*
          * Common
          */
diff --git a/src/eth/example/VCU118/fpga/tb/fpga_core/Makefile b/src/eth/example/VCU118/fpga/tb/fpga_core/Makefile
index 7692fe5..c7fe632 100644
--- a/src/eth/example/VCU118/fpga/tb/fpga_core/Makefile
+++ b/src/eth/example/VCU118/fpga/tb/fpga_core/Makefile
@@ -27,6 +27,7 @@ VERILOG_SOURCES += $(TAXI_SRC_DIR)/eth/rtl/taxi_eth_mac_1g_fifo.f
 VERILOG_SOURCES += $(TAXI_SRC_DIR)/eth/rtl/us/taxi_eth_mac_25g_us.f
 VERILOG_SOURCES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_if_uart.f
 VERILOG_SOURCES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_switch.sv
+VERILOG_SOURCES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_apb.f
 VERILOG_SOURCES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_stats.f
 VERILOG_SOURCES += $(TAXI_SRC_DIR)/lss/rtl/taxi_mdio_master.sv
 VERILOG_SOURCES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_reset.sv
diff --git a/src/eth/example/VCU118/fpga/tb/fpga_core/test_fpga_core.py b/src/eth/example/VCU118/fpga/tb/fpga_core/test_fpga_core.py
index ce27568..bcb6f54 100644
--- a/src/eth/example/VCU118/fpga/tb/fpga_core/test_fpga_core.py
+++ b/src/eth/example/VCU118/fpga/tb/fpga_core/test_fpga_core.py
@@ -277,6 +277,7 @@ def test_fpga_core(request, mac_data_w):
         os.path.join(taxi_src_dir, "eth", "rtl", "us", "taxi_eth_mac_25g_us.f"),
         os.path.join(taxi_src_dir, "xfcp", "rtl", "taxi_xfcp_if_uart.f"),
         os.path.join(taxi_src_dir, "xfcp", "rtl", "taxi_xfcp_switch.sv"),
+        os.path.join(taxi_src_dir, "xfcp", "rtl", "taxi_xfcp_mod_apb.f"),
         os.path.join(taxi_src_dir, "xfcp", "rtl", "taxi_xfcp_mod_stats.f"),
         os.path.join(taxi_src_dir, "lss", "rtl", "taxi_mdio_master.sv"),
         os.path.join(taxi_src_dir, "sync", "rtl", "taxi_sync_reset.sv"),
diff --git a/src/eth/example/XUPP3R/fpga/fpga_XUPP3R/Makefile b/src/eth/example/XUPP3R/fpga/fpga_XUPP3R/Makefile
index c2c1f85..ced0dcb 100644
--- a/src/eth/example/XUPP3R/fpga/fpga_XUPP3R/Makefile
+++ b/src/eth/example/XUPP3R/fpga/fpga_XUPP3R/Makefile
@@ -21,6 +21,7 @@ SYN_FILES += $(RTL_DIR)/fpga_core.sv
 SYN_FILES += $(TAXI_SRC_DIR)/eth/rtl/us/taxi_eth_mac_25g_us.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_if_uart.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_switch.sv
+SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_apb.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_stats.f
 SYN_FILES += $(TAXI_SRC_DIR)/axis/rtl/taxi_axis_async_fifo.f
 SYN_FILES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_reset.sv
diff --git a/src/eth/example/XUPP3R/fpga/fpga_XUPP3R_10g/Makefile b/src/eth/example/XUPP3R/fpga/fpga_XUPP3R_10g/Makefile
index 74af670..fbb1ad1 100644
--- a/src/eth/example/XUPP3R/fpga/fpga_XUPP3R_10g/Makefile
+++ b/src/eth/example/XUPP3R/fpga/fpga_XUPP3R_10g/Makefile
@@ -21,6 +21,7 @@ SYN_FILES += $(RTL_DIR)/fpga_core.sv
 SYN_FILES += $(TAXI_SRC_DIR)/eth/rtl/us/taxi_eth_mac_25g_us.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_if_uart.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_switch.sv
+SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_apb.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_stats.f
 SYN_FILES += $(TAXI_SRC_DIR)/axis/rtl/taxi_axis_async_fifo.f
 SYN_FILES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_reset.sv
diff --git a/src/eth/example/XUPP3R/fpga/fpga_XUSP3S/Makefile b/src/eth/example/XUPP3R/fpga/fpga_XUSP3S/Makefile
index 0bd7a04..26c1f54 100644
--- a/src/eth/example/XUPP3R/fpga/fpga_XUSP3S/Makefile
+++ b/src/eth/example/XUPP3R/fpga/fpga_XUSP3S/Makefile
@@ -21,6 +21,7 @@ SYN_FILES += $(RTL_DIR)/fpga_core.sv
 SYN_FILES += $(TAXI_SRC_DIR)/eth/rtl/us/taxi_eth_mac_25g_us.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_if_uart.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_switch.sv
+SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_apb.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_stats.f
 SYN_FILES += $(TAXI_SRC_DIR)/axis/rtl/taxi_axis_async_fifo.f
 SYN_FILES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_reset.sv
diff --git a/src/eth/example/XUPP3R/fpga/fpga_XUSP3S_10g/Makefile b/src/eth/example/XUPP3R/fpga/fpga_XUSP3S_10g/Makefile
index a0e1e01..818ead5 100644
--- a/src/eth/example/XUPP3R/fpga/fpga_XUSP3S_10g/Makefile
+++ b/src/eth/example/XUPP3R/fpga/fpga_XUSP3S_10g/Makefile
@@ -21,6 +21,7 @@ SYN_FILES += $(RTL_DIR)/fpga_core.sv
 SYN_FILES += $(TAXI_SRC_DIR)/eth/rtl/us/taxi_eth_mac_25g_us.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_if_uart.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_switch.sv
+SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_apb.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_stats.f
 SYN_FILES += $(TAXI_SRC_DIR)/axis/rtl/taxi_axis_async_fifo.f
 SYN_FILES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_reset.sv
diff --git a/src/eth/example/XUPP3R/fpga/rtl/fpga_core.sv b/src/eth/example/XUPP3R/fpga/rtl/fpga_core.sv
index 976120f..3de5ce0 100644
--- a/src/eth/example/XUPP3R/fpga/rtl/fpga_core.sv
+++ b/src/eth/example/XUPP3R/fpga/rtl/fpga_core.sv
@@ -118,7 +118,9 @@ xfcp_if_uart_inst (
     .prescale(16'(125000000/3000000))
 );
 
-taxi_axis_if #(.DATA_W(8), .USER_EN(1), .USER_W(1)) xfcp_sw_ds[1](), xfcp_sw_us[1]();
+localparam XFCP_PORTS = 1+GTY_QUAD_CNT;
+
+taxi_axis_if #(.DATA_W(8), .USER_EN(1), .USER_W(1)) xfcp_sw_ds[XFCP_PORTS](), xfcp_sw_us[XFCP_PORTS]();
 
 taxi_xfcp_switch #(
     .XFCP_ID_STR(FAMILY == "virtexuplus" ? "XUPP3R" : "XUSP3S"),
@@ -279,6 +281,31 @@ for (genvar n = 0; n < GTY_QUAD_CNT; n = n + 1) begin : gty_quad
 
     localparam CNT = 4;
 
+    taxi_apb_if #(
+        .ADDR_W(18),
+        .DATA_W(16)
+    )
+    gt_apb_ctrl();
+
+    taxi_xfcp_mod_apb #(
+        .XFCP_EXT_ID_STR("GTY CTRL")
+    )
+    xfcp_mod_apb_inst (
+        .clk(clk_125mhz),
+        .rst(rst_125mhz),
+
+        /*
+         * XFCP upstream port
+         */
+        .xfcp_usp_ds(xfcp_sw_ds[n+1]),
+        .xfcp_usp_us(xfcp_sw_us[n+1]),
+
+        /*
+         * APB master interface
+         */
+        .m_apb(gt_apb_ctrl)
+    );
+
     taxi_eth_mac_25g_us #(
         .SIM(SIM),
         .VENDOR(VENDOR),
@@ -319,6 +346,11 @@ for (genvar n = 0; n < GTY_QUAD_CNT; n = n + 1) begin : gty_quad
         .xcvr_ctrl_clk(clk_125mhz),
         .xcvr_ctrl_rst(eth_gty_rst[n]),
 
+        /*
+         * Transceiver control
+         */
+        .s_apb_ctrl(gt_apb_ctrl),
+
         /*
          * Common
          */
diff --git a/src/eth/example/XUPP3R/fpga/tb/fpga_core/Makefile b/src/eth/example/XUPP3R/fpga/tb/fpga_core/Makefile
index 5ca41d6..96d2e41 100644
--- a/src/eth/example/XUPP3R/fpga/tb/fpga_core/Makefile
+++ b/src/eth/example/XUPP3R/fpga/tb/fpga_core/Makefile
@@ -26,6 +26,7 @@ VERILOG_SOURCES += $(RTL_DIR)/$(DUT).sv
 VERILOG_SOURCES += $(TAXI_SRC_DIR)/eth/rtl/us/taxi_eth_mac_25g_us.f
 VERILOG_SOURCES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_if_uart.f
 VERILOG_SOURCES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_switch.sv
+VERILOG_SOURCES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_apb.f
 VERILOG_SOURCES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_stats.f
 VERILOG_SOURCES += $(TAXI_SRC_DIR)/axis/rtl/taxi_axis_async_fifo.f
 VERILOG_SOURCES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_reset.sv
diff --git a/src/eth/example/XUPP3R/fpga/tb/fpga_core/test_fpga_core.py b/src/eth/example/XUPP3R/fpga/tb/fpga_core/test_fpga_core.py
index b04da2f..0648c30 100644
--- a/src/eth/example/XUPP3R/fpga/tb/fpga_core/test_fpga_core.py
+++ b/src/eth/example/XUPP3R/fpga/tb/fpga_core/test_fpga_core.py
@@ -214,6 +214,7 @@ def test_fpga_core(request, mac_data_w):
         os.path.join(taxi_src_dir, "eth", "rtl", "us", "taxi_eth_mac_25g_us.f"),
         os.path.join(taxi_src_dir, "xfcp", "rtl", "taxi_xfcp_if_uart.f"),
         os.path.join(taxi_src_dir, "xfcp", "rtl", "taxi_xfcp_switch.sv"),
+        os.path.join(taxi_src_dir, "xfcp", "rtl", "taxi_xfcp_mod_apb.f"),
         os.path.join(taxi_src_dir, "xfcp", "rtl", "taxi_xfcp_mod_stats.f"),
         os.path.join(taxi_src_dir, "axis", "rtl", "taxi_axis_async_fifo.f"),
         os.path.join(taxi_src_dir, "sync", "rtl", "taxi_sync_reset.sv"),
diff --git a/src/eth/example/ZCU102/fpga/fpga_10g/Makefile b/src/eth/example/ZCU102/fpga/fpga_10g/Makefile
index a96c0a8..53a3389 100644
--- a/src/eth/example/ZCU102/fpga/fpga_10g/Makefile
+++ b/src/eth/example/ZCU102/fpga/fpga_10g/Makefile
@@ -21,6 +21,7 @@ SYN_FILES += $(RTL_DIR)/fpga_core.sv
 SYN_FILES += $(TAXI_SRC_DIR)/eth/rtl/us/taxi_eth_mac_25g_us.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_if_uart.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_switch.sv
+SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_apb.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_stats.f
 SYN_FILES += $(TAXI_SRC_DIR)/axis/rtl/taxi_axis_async_fifo.f
 SYN_FILES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_reset.sv
@@ -52,4 +53,3 @@ program: $(FPGA_TOP).bit
 	echo "program_hw_devices [current_hw_device]" >> program.tcl
 	echo "exit" >> program.tcl
 	vivado -nojournal -nolog -mode batch -source program.tcl
-
diff --git a/src/eth/example/ZCU102/fpga/rtl/fpga_core.sv b/src/eth/example/ZCU102/fpga/rtl/fpga_core.sv
index b29636d..b638f6d 100644
--- a/src/eth/example/ZCU102/fpga/rtl/fpga_core.sv
+++ b/src/eth/example/ZCU102/fpga/rtl/fpga_core.sv
@@ -139,7 +139,9 @@ xfcp_if_uart_inst (
     .prescale(16'(125000000/2000000))
 );
 
-taxi_axis_if #(.DATA_W(8), .USER_EN(1), .USER_W(1)) xfcp_sw_ds[1](), xfcp_sw_us[1]();
+localparam XFCP_PORTS = SFP_RATE ? 2 : 1;
+
+taxi_axis_if #(.DATA_W(8), .USER_EN(1), .USER_W(1)) xfcp_sw_ds[XFCP_PORTS](), xfcp_sw_us[XFCP_PORTS]();
 
 taxi_xfcp_switch #(
     .XFCP_ID_STR("ZCU102"),
@@ -615,6 +617,31 @@ end else begin : sfp_mac
         .out(sfp_rst)
     );
 
+    taxi_apb_if #(
+        .ADDR_W(18),
+        .DATA_W(16)
+    )
+    gt_apb_ctrl();
+
+    taxi_xfcp_mod_apb #(
+        .XFCP_EXT_ID_STR("GTH CTRL")
+    )
+    xfcp_mod_apb_inst (
+        .clk(clk_125mhz),
+        .rst(rst_125mhz),
+
+        /*
+         * XFCP upstream port
+         */
+        .xfcp_usp_ds(xfcp_sw_ds[1]),
+        .xfcp_usp_us(xfcp_sw_us[1]),
+
+        /*
+         * APB master interface
+         */
+        .m_apb(gt_apb_ctrl)
+    );
+
     taxi_eth_mac_25g_us #(
         .SIM(SIM),
         .VENDOR(VENDOR),
@@ -652,6 +679,11 @@ end else begin : sfp_mac
         .xcvr_ctrl_clk(clk_125mhz),
         .xcvr_ctrl_rst(sfp_rst),
 
+        /*
+         * Transceiver control
+         */
+        .s_apb_ctrl(gt_apb_ctrl),
+
         /*
          * Common
          */
diff --git a/src/eth/example/ZCU102/fpga/tb/fpga_core/Makefile b/src/eth/example/ZCU102/fpga/tb/fpga_core/Makefile
index 9dce2bc..f51c242 100644
--- a/src/eth/example/ZCU102/fpga/tb/fpga_core/Makefile
+++ b/src/eth/example/ZCU102/fpga/tb/fpga_core/Makefile
@@ -27,6 +27,7 @@ VERILOG_SOURCES += $(TAXI_SRC_DIR)/eth/rtl/taxi_eth_mac_1g_fifo.f
 VERILOG_SOURCES += $(TAXI_SRC_DIR)/eth/rtl/us/taxi_eth_mac_25g_us.f
 VERILOG_SOURCES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_if_uart.f
 VERILOG_SOURCES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_switch.sv
+VERILOG_SOURCES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_apb.f
 VERILOG_SOURCES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_stats.f
 VERILOG_SOURCES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_reset.sv
 VERILOG_SOURCES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_signal.sv
diff --git a/src/eth/example/ZCU102/fpga/tb/fpga_core/test_fpga_core.py b/src/eth/example/ZCU102/fpga/tb/fpga_core/test_fpga_core.py
index 53e29c0..f6011be 100644
--- a/src/eth/example/ZCU102/fpga/tb/fpga_core/test_fpga_core.py
+++ b/src/eth/example/ZCU102/fpga/tb/fpga_core/test_fpga_core.py
@@ -293,6 +293,7 @@ def test_fpga_core(request, sfp_rate):
         os.path.join(taxi_src_dir, "eth", "rtl", "us", "taxi_eth_mac_25g_us.f"),
         os.path.join(taxi_src_dir, "xfcp", "rtl", "taxi_xfcp_if_uart.f"),
         os.path.join(taxi_src_dir, "xfcp", "rtl", "taxi_xfcp_switch.sv"),
+        os.path.join(taxi_src_dir, "xfcp", "rtl", "taxi_xfcp_mod_apb.f"),
         os.path.join(taxi_src_dir, "xfcp", "rtl", "taxi_xfcp_mod_stats.f"),
         os.path.join(taxi_src_dir, "sync", "rtl", "taxi_sync_reset.sv"),
         os.path.join(taxi_src_dir, "sync", "rtl", "taxi_sync_signal.sv"),
diff --git a/src/eth/example/ZCU106/fpga/fpga_10g/Makefile b/src/eth/example/ZCU106/fpga/fpga_10g/Makefile
index adbcf24..9ae04cb 100644
--- a/src/eth/example/ZCU106/fpga/fpga_10g/Makefile
+++ b/src/eth/example/ZCU106/fpga/fpga_10g/Makefile
@@ -21,6 +21,7 @@ SYN_FILES += $(RTL_DIR)/fpga_core.sv
 SYN_FILES += $(TAXI_SRC_DIR)/eth/rtl/us/taxi_eth_mac_25g_us.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_if_uart.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_switch.sv
+SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_apb.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_stats.f
 SYN_FILES += $(TAXI_SRC_DIR)/axis/rtl/taxi_axis_async_fifo.f
 SYN_FILES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_reset.sv
@@ -52,4 +53,3 @@ program: $(FPGA_TOP).bit
 	echo "program_hw_devices [current_hw_device]" >> program.tcl
 	echo "exit" >> program.tcl
 	vivado -nojournal -nolog -mode batch -source program.tcl
-
diff --git a/src/eth/example/ZCU106/fpga/fpga_10g_64/Makefile b/src/eth/example/ZCU106/fpga/fpga_10g_64/Makefile
index 8c9416c..77a1fd8 100644
--- a/src/eth/example/ZCU106/fpga/fpga_10g_64/Makefile
+++ b/src/eth/example/ZCU106/fpga/fpga_10g_64/Makefile
@@ -21,6 +21,7 @@ SYN_FILES += $(RTL_DIR)/fpga_core.sv
 SYN_FILES += $(TAXI_SRC_DIR)/eth/rtl/us/taxi_eth_mac_25g_us.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_if_uart.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_switch.sv
+SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_apb.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_stats.f
 SYN_FILES += $(TAXI_SRC_DIR)/axis/rtl/taxi_axis_async_fifo.f
 SYN_FILES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_reset.sv
@@ -52,4 +53,3 @@ program: $(FPGA_TOP).bit
 	echo "program_hw_devices [current_hw_device]" >> program.tcl
 	echo "exit" >> program.tcl
 	vivado -nojournal -nolog -mode batch -source program.tcl
-
diff --git a/src/eth/example/ZCU106/fpga/fpga_10g_64_async/Makefile b/src/eth/example/ZCU106/fpga/fpga_10g_64_async/Makefile
index 8c9416c..77a1fd8 100644
--- a/src/eth/example/ZCU106/fpga/fpga_10g_64_async/Makefile
+++ b/src/eth/example/ZCU106/fpga/fpga_10g_64_async/Makefile
@@ -21,6 +21,7 @@ SYN_FILES += $(RTL_DIR)/fpga_core.sv
 SYN_FILES += $(TAXI_SRC_DIR)/eth/rtl/us/taxi_eth_mac_25g_us.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_if_uart.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_switch.sv
+SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_apb.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_stats.f
 SYN_FILES += $(TAXI_SRC_DIR)/axis/rtl/taxi_axis_async_fifo.f
 SYN_FILES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_reset.sv
@@ -52,4 +53,3 @@ program: $(FPGA_TOP).bit
 	echo "program_hw_devices [current_hw_device]" >> program.tcl
 	echo "exit" >> program.tcl
 	vivado -nojournal -nolog -mode batch -source program.tcl
-
diff --git a/src/eth/example/ZCU106/fpga/fpga_10g_64_split/Makefile b/src/eth/example/ZCU106/fpga/fpga_10g_64_split/Makefile
index 8c9416c..77a1fd8 100644
--- a/src/eth/example/ZCU106/fpga/fpga_10g_64_split/Makefile
+++ b/src/eth/example/ZCU106/fpga/fpga_10g_64_split/Makefile
@@ -21,6 +21,7 @@ SYN_FILES += $(RTL_DIR)/fpga_core.sv
 SYN_FILES += $(TAXI_SRC_DIR)/eth/rtl/us/taxi_eth_mac_25g_us.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_if_uart.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_switch.sv
+SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_apb.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_stats.f
 SYN_FILES += $(TAXI_SRC_DIR)/axis/rtl/taxi_axis_async_fifo.f
 SYN_FILES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_reset.sv
@@ -52,4 +53,3 @@ program: $(FPGA_TOP).bit
 	echo "program_hw_devices [current_hw_device]" >> program.tcl
 	echo "exit" >> program.tcl
 	vivado -nojournal -nolog -mode batch -source program.tcl
-
diff --git a/src/eth/example/ZCU106/fpga/fpga_10g_64_split_async/Makefile b/src/eth/example/ZCU106/fpga/fpga_10g_64_split_async/Makefile
index 8c9416c..77a1fd8 100644
--- a/src/eth/example/ZCU106/fpga/fpga_10g_64_split_async/Makefile
+++ b/src/eth/example/ZCU106/fpga/fpga_10g_64_split_async/Makefile
@@ -21,6 +21,7 @@ SYN_FILES += $(RTL_DIR)/fpga_core.sv
 SYN_FILES += $(TAXI_SRC_DIR)/eth/rtl/us/taxi_eth_mac_25g_us.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_if_uart.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_switch.sv
+SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_apb.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_stats.f
 SYN_FILES += $(TAXI_SRC_DIR)/axis/rtl/taxi_axis_async_fifo.f
 SYN_FILES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_reset.sv
@@ -52,4 +53,3 @@ program: $(FPGA_TOP).bit
 	echo "program_hw_devices [current_hw_device]" >> program.tcl
 	echo "exit" >> program.tcl
 	vivado -nojournal -nolog -mode batch -source program.tcl
-
diff --git a/src/eth/example/ZCU106/fpga/fpga_10g_async/Makefile b/src/eth/example/ZCU106/fpga/fpga_10g_async/Makefile
index adbcf24..9ae04cb 100644
--- a/src/eth/example/ZCU106/fpga/fpga_10g_async/Makefile
+++ b/src/eth/example/ZCU106/fpga/fpga_10g_async/Makefile
@@ -21,6 +21,7 @@ SYN_FILES += $(RTL_DIR)/fpga_core.sv
 SYN_FILES += $(TAXI_SRC_DIR)/eth/rtl/us/taxi_eth_mac_25g_us.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_if_uart.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_switch.sv
+SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_apb.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_stats.f
 SYN_FILES += $(TAXI_SRC_DIR)/axis/rtl/taxi_axis_async_fifo.f
 SYN_FILES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_reset.sv
@@ -52,4 +53,3 @@ program: $(FPGA_TOP).bit
 	echo "program_hw_devices [current_hw_device]" >> program.tcl
 	echo "exit" >> program.tcl
 	vivado -nojournal -nolog -mode batch -source program.tcl
-
diff --git a/src/eth/example/ZCU106/fpga/fpga_10g_split/Makefile b/src/eth/example/ZCU106/fpga/fpga_10g_split/Makefile
index adbcf24..9ae04cb 100644
--- a/src/eth/example/ZCU106/fpga/fpga_10g_split/Makefile
+++ b/src/eth/example/ZCU106/fpga/fpga_10g_split/Makefile
@@ -21,6 +21,7 @@ SYN_FILES += $(RTL_DIR)/fpga_core.sv
 SYN_FILES += $(TAXI_SRC_DIR)/eth/rtl/us/taxi_eth_mac_25g_us.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_if_uart.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_switch.sv
+SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_apb.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_stats.f
 SYN_FILES += $(TAXI_SRC_DIR)/axis/rtl/taxi_axis_async_fifo.f
 SYN_FILES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_reset.sv
@@ -52,4 +53,3 @@ program: $(FPGA_TOP).bit
 	echo "program_hw_devices [current_hw_device]" >> program.tcl
 	echo "exit" >> program.tcl
 	vivado -nojournal -nolog -mode batch -source program.tcl
-
diff --git a/src/eth/example/ZCU106/fpga/fpga_10g_split_async/Makefile b/src/eth/example/ZCU106/fpga/fpga_10g_split_async/Makefile
index adbcf24..9ae04cb 100644
--- a/src/eth/example/ZCU106/fpga/fpga_10g_split_async/Makefile
+++ b/src/eth/example/ZCU106/fpga/fpga_10g_split_async/Makefile
@@ -21,6 +21,7 @@ SYN_FILES += $(RTL_DIR)/fpga_core.sv
 SYN_FILES += $(TAXI_SRC_DIR)/eth/rtl/us/taxi_eth_mac_25g_us.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_if_uart.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_switch.sv
+SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_apb.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_stats.f
 SYN_FILES += $(TAXI_SRC_DIR)/axis/rtl/taxi_axis_async_fifo.f
 SYN_FILES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_reset.sv
@@ -52,4 +53,3 @@ program: $(FPGA_TOP).bit
 	echo "program_hw_devices [current_hw_device]" >> program.tcl
 	echo "exit" >> program.tcl
 	vivado -nojournal -nolog -mode batch -source program.tcl
-
diff --git a/src/eth/example/ZCU106/fpga/rtl/fpga_core.sv b/src/eth/example/ZCU106/fpga/rtl/fpga_core.sv
index 028659a..c06ed40 100644
--- a/src/eth/example/ZCU106/fpga/rtl/fpga_core.sv
+++ b/src/eth/example/ZCU106/fpga/rtl/fpga_core.sv
@@ -123,7 +123,9 @@ xfcp_if_uart_inst (
     .prescale(16'(125000000/2000000))
 );
 
-taxi_axis_if #(.DATA_W(8), .USER_EN(1), .USER_W(1)) xfcp_sw_ds[1](), xfcp_sw_us[1]();
+localparam XFCP_PORTS = SFP_RATE ? 2 : 1;
+
+taxi_axis_if #(.DATA_W(8), .USER_EN(1), .USER_W(1)) xfcp_sw_ds[XFCP_PORTS](), xfcp_sw_us[XFCP_PORTS]();
 
 taxi_xfcp_switch #(
     .XFCP_ID_STR("ZCU106"),
@@ -429,6 +431,31 @@ end else begin : sfp_mac
         .out(sfp_rst)
     );
 
+    taxi_apb_if #(
+        .ADDR_W(18),
+        .DATA_W(16)
+    )
+    gt_apb_ctrl();
+
+    taxi_xfcp_mod_apb #(
+        .XFCP_EXT_ID_STR("GTH CTRL")
+    )
+    xfcp_mod_apb_inst (
+        .clk(clk_125mhz),
+        .rst(rst_125mhz),
+
+        /*
+         * XFCP upstream port
+         */
+        .xfcp_usp_ds(xfcp_sw_ds[1]),
+        .xfcp_usp_us(xfcp_sw_us[1]),
+
+        /*
+         * APB master interface
+         */
+        .m_apb(gt_apb_ctrl)
+    );
+
     taxi_eth_mac_25g_us #(
         .SIM(SIM),
         .VENDOR(VENDOR),
@@ -468,6 +495,11 @@ end else begin : sfp_mac
         .xcvr_ctrl_clk(clk_125mhz),
         .xcvr_ctrl_rst(sfp_rst),
 
+        /*
+         * Transceiver control
+         */
+        .s_apb_ctrl(gt_apb_ctrl),
+
         /*
          * Common
          */
diff --git a/src/eth/example/ZCU106/fpga/tb/fpga_core/Makefile b/src/eth/example/ZCU106/fpga/tb/fpga_core/Makefile
index 0d9240b..d2a6bf7 100644
--- a/src/eth/example/ZCU106/fpga/tb/fpga_core/Makefile
+++ b/src/eth/example/ZCU106/fpga/tb/fpga_core/Makefile
@@ -27,6 +27,7 @@ VERILOG_SOURCES += $(TAXI_SRC_DIR)/eth/rtl/taxi_eth_mac_1g_fifo.f
 VERILOG_SOURCES += $(TAXI_SRC_DIR)/eth/rtl/us/taxi_eth_mac_25g_us.f
 VERILOG_SOURCES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_if_uart.f
 VERILOG_SOURCES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_switch.sv
+VERILOG_SOURCES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_apb.f
 VERILOG_SOURCES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_stats.f
 VERILOG_SOURCES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_reset.sv
 VERILOG_SOURCES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_signal.sv
diff --git a/src/eth/example/ZCU106/fpga/tb/fpga_core/test_fpga_core.py b/src/eth/example/ZCU106/fpga/tb/fpga_core/test_fpga_core.py
index 854bd85..3d45696 100644
--- a/src/eth/example/ZCU106/fpga/tb/fpga_core/test_fpga_core.py
+++ b/src/eth/example/ZCU106/fpga/tb/fpga_core/test_fpga_core.py
@@ -285,6 +285,7 @@ def test_fpga_core(request, sfp_rate, mac_data_w):
         os.path.join(taxi_src_dir, "eth", "rtl", "us", "taxi_eth_mac_25g_us.f"),
         os.path.join(taxi_src_dir, "xfcp", "rtl", "taxi_xfcp_if_uart.f"),
         os.path.join(taxi_src_dir, "xfcp", "rtl", "taxi_xfcp_switch.sv"),
+        os.path.join(taxi_src_dir, "xfcp", "rtl", "taxi_xfcp_mod_apb.f"),
         os.path.join(taxi_src_dir, "xfcp", "rtl", "taxi_xfcp_mod_stats.f"),
         os.path.join(taxi_src_dir, "sync", "rtl", "taxi_sync_reset.sv"),
         os.path.join(taxi_src_dir, "sync", "rtl", "taxi_sync_signal.sv"),
diff --git a/src/eth/example/ZCU111/fpga/fpga/Makefile b/src/eth/example/ZCU111/fpga/fpga/Makefile
index f370843..4f2d4a3 100644
--- a/src/eth/example/ZCU111/fpga/fpga/Makefile
+++ b/src/eth/example/ZCU111/fpga/fpga/Makefile
@@ -22,8 +22,9 @@ SYN_FILES += $(RTL_DIR)/../pll/pll_i2c_init.sv
 SYN_FILES += $(TAXI_SRC_DIR)/eth/rtl/us/taxi_eth_mac_25g_us.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_if_uart.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_switch.sv
-SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_stats.f
+SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_apb.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_i2c_master.f
+SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_stats.f
 SYN_FILES += $(TAXI_SRC_DIR)/axis/rtl/taxi_axis_async_fifo.f
 SYN_FILES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_reset.sv
 SYN_FILES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_signal.sv
diff --git a/src/eth/example/ZCU111/fpga/fpga_10g/Makefile b/src/eth/example/ZCU111/fpga/fpga_10g/Makefile
index b276d65..28b503b 100644
--- a/src/eth/example/ZCU111/fpga/fpga_10g/Makefile
+++ b/src/eth/example/ZCU111/fpga/fpga_10g/Makefile
@@ -22,8 +22,9 @@ SYN_FILES += $(RTL_DIR)/../pll/pll_i2c_init.sv
 SYN_FILES += $(TAXI_SRC_DIR)/eth/rtl/us/taxi_eth_mac_25g_us.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_if_uart.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_switch.sv
-SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_stats.f
+SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_apb.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_i2c_master.f
+SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_stats.f
 SYN_FILES += $(TAXI_SRC_DIR)/axis/rtl/taxi_axis_async_fifo.f
 SYN_FILES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_reset.sv
 SYN_FILES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_signal.sv
diff --git a/src/eth/example/ZCU111/fpga/rtl/fpga_core.sv b/src/eth/example/ZCU111/fpga/rtl/fpga_core.sv
index 1591504..6b3823c 100644
--- a/src/eth/example/ZCU111/fpga/rtl/fpga_core.sv
+++ b/src/eth/example/ZCU111/fpga/rtl/fpga_core.sv
@@ -132,7 +132,9 @@ xfcp_if_uart_inst (
     .prescale(16'(125000000/3000000))
 );
 
-taxi_axis_if #(.DATA_W(8), .USER_EN(1), .USER_W(1)) xfcp_sw_ds[4](), xfcp_sw_us[4]();
+localparam XFCP_PORTS = 5;
+
+taxi_axis_if #(.DATA_W(8), .USER_EN(1), .USER_W(1)) xfcp_sw_ds[XFCP_PORTS](), xfcp_sw_us[XFCP_PORTS]();
 
 taxi_xfcp_switch #(
     .XFCP_ID_STR("ZCU111"),
@@ -336,6 +338,31 @@ sfp_sync_reset_inst (
     .out(sfp_rst)
 );
 
+taxi_apb_if #(
+    .ADDR_W(18),
+    .DATA_W(16)
+)
+gt_apb_ctrl();
+
+taxi_xfcp_mod_apb #(
+    .XFCP_EXT_ID_STR("GTY CTRL")
+)
+xfcp_mod_apb_inst (
+    .clk(clk_125mhz),
+    .rst(rst_125mhz),
+
+    /*
+     * XFCP upstream port
+     */
+    .xfcp_usp_ds(xfcp_sw_ds[4]),
+    .xfcp_usp_us(xfcp_sw_us[4]),
+
+    /*
+     * APB master interface
+     */
+    .m_apb(gt_apb_ctrl)
+);
+
 taxi_eth_mac_25g_us #(
     .SIM(SIM),
     .VENDOR(VENDOR),
@@ -374,6 +401,11 @@ sfp_mac_inst (
     .xcvr_ctrl_clk(clk_125mhz),
     .xcvr_ctrl_rst(sfp_rst),
 
+    /*
+     * Transceiver control
+     */
+    .s_apb_ctrl(gt_apb_ctrl),
+
     /*
      * Common
      */
diff --git a/src/eth/example/ZCU111/fpga/tb/fpga_core/Makefile b/src/eth/example/ZCU111/fpga/tb/fpga_core/Makefile
index 77908bf..1c0953d 100644
--- a/src/eth/example/ZCU111/fpga/tb/fpga_core/Makefile
+++ b/src/eth/example/ZCU111/fpga/tb/fpga_core/Makefile
@@ -29,6 +29,7 @@ VERILOG_SOURCES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_if_uart.f
 VERILOG_SOURCES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_switch.sv
 VERILOG_SOURCES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_stats.f
 VERILOG_SOURCES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_i2c_master.f
+VERILOG_SOURCES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_apb.f
 VERILOG_SOURCES += $(TAXI_SRC_DIR)/axis/rtl/taxi_axis_async_fifo.f
 VERILOG_SOURCES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_reset.sv
 VERILOG_SOURCES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_signal.sv
diff --git a/src/eth/example/ZCU111/fpga/tb/fpga_core/test_fpga_core.py b/src/eth/example/ZCU111/fpga/tb/fpga_core/test_fpga_core.py
index 5fde9bf..2bbcc31 100644
--- a/src/eth/example/ZCU111/fpga/tb/fpga_core/test_fpga_core.py
+++ b/src/eth/example/ZCU111/fpga/tb/fpga_core/test_fpga_core.py
@@ -227,6 +227,7 @@ def test_fpga_core(request, mac_data_w):
         os.path.join(taxi_src_dir, "eth", "rtl", "us", "taxi_eth_mac_25g_us.f"),
         os.path.join(taxi_src_dir, "xfcp", "rtl", "taxi_xfcp_if_uart.f"),
         os.path.join(taxi_src_dir, "xfcp", "rtl", "taxi_xfcp_switch.sv"),
+        os.path.join(taxi_src_dir, "xfcp", "rtl", "taxi_xfcp_mod_apb.f"),
         os.path.join(taxi_src_dir, "xfcp", "rtl", "taxi_xfcp_mod_stats.f"),
         os.path.join(taxi_src_dir, "xfcp", "rtl", "taxi_xfcp_mod_i2c_master.f"),
         os.path.join(taxi_src_dir, "axis", "rtl", "taxi_axis_async_fifo.f"),
diff --git a/src/eth/example/fb2CG/fpga/rtl/fpga_core.sv b/src/eth/example/fb2CG/fpga/rtl/fpga_core.sv
index 5443fb2..e613c9b 100644
--- a/src/eth/example/fb2CG/fpga/rtl/fpga_core.sv
+++ b/src/eth/example/fb2CG/fpga/rtl/fpga_core.sv
@@ -197,6 +197,12 @@ for (genvar n = 0; n < 2; n = n + 1) begin : gty_quad
     localparam CLK = n;
     localparam CNT = 4;
 
+    taxi_apb_if #(
+        .ADDR_W(18),
+        .DATA_W(16)
+    )
+    gt_apb_ctrl();
+
     taxi_eth_mac_25g_us #(
         .SIM(SIM),
         .VENDOR(VENDOR),
@@ -229,6 +235,11 @@ for (genvar n = 0; n < 2; n = n + 1) begin : gty_quad
         .xcvr_ctrl_clk(clk_125mhz),
         .xcvr_ctrl_rst(qsfp_rst[CLK]),
 
+        /*
+         * Transceiver control
+         */
+        .s_apb_ctrl(gt_apb_ctrl),
+
         /*
          * Common
          */