eth: Add frame length enforcement and additional statistics outputs to taxi_axis_xgmii_tx_64

Signed-off-by: Alex Forencich <alex@alexforencich.com>
This commit is contained in:
Alex Forencich
2025-04-07 22:01:57 -07:00
parent 6d31116596
commit 4fd3028f77
4 changed files with 432 additions and 37 deletions

View File

@@ -41,9 +41,25 @@ class TB:
self.ptp_clock = PtpClockSimTime(ts_tod=dut.ptp_ts, clock=dut.clk)
self.tx_cpl_sink = AxiStreamSink(AxiStreamBus.from_entity(dut.m_axis_tx_cpl), dut.clk, dut.rst)
dut.cfg_ifg.setimmediatevalue(0)
dut.cfg_tx_max_pkt_len.setimmediatevalue(0)
dut.cfg_tx_ifg.setimmediatevalue(0)
dut.cfg_tx_enable.setimmediatevalue(0)
self.stats = {}
self.stats["stat_tx_byte"] = 0
self.stats["stat_tx_pkt_len"] = 0
self.stats["stat_tx_pkt_ucast"] = 0
self.stats["stat_tx_pkt_mcast"] = 0
self.stats["stat_tx_pkt_bcast"] = 0
self.stats["stat_tx_pkt_vlan"] = 0
self.stats["stat_tx_pkt_good"] = 0
self.stats["stat_tx_pkt_bad"] = 0
self.stats["stat_tx_err_oversize"] = 0
self.stats["stat_tx_err_user"] = 0
self.stats["stat_tx_err_underflow"] = 0
cocotb.start_soon(self._run_stats_counters())
async def reset(self):
self.dut.rst.setimmediatevalue(0)
await RisingEdge(self.dut.clk)
@@ -55,20 +71,38 @@ class TB:
await RisingEdge(self.dut.clk)
await RisingEdge(self.dut.clk)
self.stats_reset()
def stats_reset(self):
for stat in self.stats:
self.stats[stat] = 0
async def _run_stats_counters(self):
while True:
await RisingEdge(self.dut.clk)
for stat in self.stats:
self.stats[stat] += int(getattr(self.dut, stat).value)
async def run_test(dut, payload_lengths=None, payload_data=None, ifg=12):
tb = TB(dut)
tb.dut.cfg_ifg.value = ifg
tb.dut.cfg_tx_max_pkt_len.value = 9218
tb.dut.cfg_tx_ifg.value = ifg
tb.dut.cfg_tx_enable.value = 1
await tb.reset()
test_frames = [payload_data(x) for x in payload_lengths()]
total_bytes = 0
total_pkts = 0
for test_data in test_frames:
await tb.source.send(AxiStreamFrame(test_data, tid=0, tuser=0))
total_bytes += max(len(test_data), 60)+4
total_pkts += 1
for test_data in test_frames:
rx_frame = await tb.sink.recv()
@@ -93,6 +127,21 @@ async def run_test(dut, payload_lengths=None, payload_data=None, ifg=12):
assert tb.sink.empty()
for stat, val in tb.stats.items():
tb.log.info("%s: %d", stat, val)
assert tb.stats["stat_tx_byte"] == total_bytes
assert tb.stats["stat_tx_pkt_len"] == total_bytes
assert tb.stats["stat_tx_pkt_ucast"] == total_pkts
assert tb.stats["stat_tx_pkt_mcast"] == 0
assert tb.stats["stat_tx_pkt_bcast"] == 0
assert tb.stats["stat_tx_pkt_vlan"] == 0
assert tb.stats["stat_tx_pkt_good"] == total_pkts
assert tb.stats["stat_tx_pkt_bad"] == 0
assert tb.stats["stat_tx_err_oversize"] == 0
assert tb.stats["stat_tx_err_user"] == 0
assert tb.stats["stat_tx_err_underflow"] == 0
await RisingEdge(dut.clk)
await RisingEdge(dut.clk)
@@ -105,11 +154,15 @@ async def run_test_alignment(dut, payload_data=None, ifg=12):
byte_width = tb.source.width // 8
tb.dut.cfg_ifg.value = ifg
tb.dut.cfg_tx_max_pkt_len.value = 9218
tb.dut.cfg_tx_ifg.value = ifg
tb.dut.cfg_tx_enable.value = 1
await tb.reset()
total_bytes = 0
total_pkts = 0
for length in range(60, 92):
for k in range(10):
@@ -120,6 +173,8 @@ async def run_test_alignment(dut, payload_data=None, ifg=12):
for test_data in test_frames:
await tb.source.send(AxiStreamFrame(test_data, tid=0, tuser=0))
total_bytes += max(len(test_data), 60)+4
total_pkts += 1
for test_data in test_frames:
rx_frame = await tb.sink.recv()
@@ -180,6 +235,21 @@ async def run_test_alignment(dut, payload_data=None, ifg=12):
assert tb.sink.empty()
for stat, val in tb.stats.items():
tb.log.info("%s: %d", stat, val)
assert tb.stats["stat_tx_byte"] == total_bytes
assert tb.stats["stat_tx_pkt_len"] == total_bytes
assert tb.stats["stat_tx_pkt_ucast"] == total_pkts
assert tb.stats["stat_tx_pkt_mcast"] == 0
assert tb.stats["stat_tx_pkt_bcast"] == 0
assert tb.stats["stat_tx_pkt_vlan"] == 0
assert tb.stats["stat_tx_pkt_good"] == total_pkts
assert tb.stats["stat_tx_pkt_bad"] == 0
assert tb.stats["stat_tx_err_oversize"] == 0
assert tb.stats["stat_tx_err_user"] == 0
assert tb.stats["stat_tx_err_underflow"] == 0
await RisingEdge(dut.clk)
await RisingEdge(dut.clk)
@@ -188,7 +258,8 @@ async def run_test_underrun(dut, ifg=12):
tb = TB(dut)
tb.dut.cfg_ifg.value = ifg
tb.dut.cfg_tx_max_pkt_len.value = 9218
tb.dut.cfg_tx_ifg.value = ifg
tb.dut.cfg_tx_enable.value = 1
await tb.reset()
@@ -222,6 +293,21 @@ async def run_test_underrun(dut, ifg=12):
assert tb.sink.empty()
for stat, val in tb.stats.items():
tb.log.info("%s: %d", stat, val)
assert tb.stats["stat_tx_byte"] > 64*2 + 32
assert tb.stats["stat_tx_pkt_len"] > 64*2 + 32
assert tb.stats["stat_tx_pkt_ucast"] == 3
assert tb.stats["stat_tx_pkt_mcast"] == 0
assert tb.stats["stat_tx_pkt_bcast"] == 0
assert tb.stats["stat_tx_pkt_vlan"] == 0
assert tb.stats["stat_tx_pkt_good"] == 2
assert tb.stats["stat_tx_pkt_bad"] == 1
assert tb.stats["stat_tx_err_oversize"] == 0
assert tb.stats["stat_tx_err_user"] == 0
assert tb.stats["stat_tx_err_underflow"] == 1
await RisingEdge(dut.clk)
await RisingEdge(dut.clk)
@@ -230,7 +316,8 @@ async def run_test_error(dut, ifg=12):
tb = TB(dut)
tb.dut.cfg_ifg.value = ifg
tb.dut.cfg_tx_max_pkt_len.value = 9218
tb.dut.cfg_tx_ifg.value = ifg
tb.dut.cfg_tx_enable.value = 1
await tb.reset()
@@ -256,6 +343,106 @@ async def run_test_error(dut, ifg=12):
assert tb.sink.empty()
for stat, val in tb.stats.items():
tb.log.info("%s: %d", stat, val)
assert tb.stats["stat_tx_byte"] > 64*2 + 32
assert tb.stats["stat_tx_pkt_len"] > 64*2 + 32
assert tb.stats["stat_tx_pkt_ucast"] == 3
assert tb.stats["stat_tx_pkt_mcast"] == 0
assert tb.stats["stat_tx_pkt_bcast"] == 0
assert tb.stats["stat_tx_pkt_vlan"] == 0
assert tb.stats["stat_tx_pkt_good"] == 2
assert tb.stats["stat_tx_pkt_bad"] == 1
assert tb.stats["stat_tx_err_oversize"] == 0
assert tb.stats["stat_tx_err_user"] == 1
assert tb.stats["stat_tx_err_underflow"] == 0
await RisingEdge(dut.clk)
await RisingEdge(dut.clk)
async def run_test_oversize(dut, ifg=12):
tb = TB(dut)
tb.dut.cfg_tx_max_pkt_len.value = 1518
tb.dut.cfg_tx_ifg.value = ifg
tb.dut.cfg_tx_enable.value = 1
await tb.reset()
for max_len in range(128-4-8, 128-4+9):
tb.stats_reset()
total_bytes = 0
total_pkts = 0
good_bytes = 0
oversz_pkts = 0
oversz_bytes_in = 0
oversz_bytes_out = 0
for test_pkt_len in range(max_len-8, max_len+9):
tb.log.info("max len %d (without FCS), test len %d (without FCS)", max_len, test_pkt_len)
tb.dut.cfg_tx_max_pkt_len.value = max_len+4
test_data_1 = bytes(x for x in range(60))
test_data_2 = bytes(x for x in range(test_pkt_len))
for k in range(3):
if k == 1:
test_data = test_data_2
else:
test_data = test_data_1
test_frame = AxiStreamFrame(test_data)
await tb.source.send(test_frame)
total_bytes += max(len(test_data), 60)+4
total_pkts += 1
if len(test_data) > max_len:
oversz_pkts += 1
oversz_bytes_in += len(test_data)+4
oversz_bytes_out += max_len
else:
good_bytes += len(test_data)+4
for k in range(3):
rx_frame = await tb.sink.recv()
if k == 1:
if test_pkt_len > max_len:
assert rx_frame.data[-1] == 0xFE
assert rx_frame.ctrl[-1] == 1
else:
assert rx_frame.get_payload() == test_data_2
assert rx_frame.check_fcs()
assert rx_frame.ctrl is None
else:
assert rx_frame.get_payload() == test_data_1
assert rx_frame.check_fcs()
assert rx_frame.ctrl is None
assert tb.sink.empty()
for stat, val in tb.stats.items():
tb.log.info("%s: %d", stat, val)
assert tb.stats["stat_tx_byte"] >= good_bytes+oversz_bytes_out-8*oversz_pkts
assert tb.stats["stat_tx_byte"] <= good_bytes+oversz_bytes_in
assert tb.stats["stat_tx_pkt_len"] >= good_bytes+oversz_bytes_out-8*oversz_pkts
assert tb.stats["stat_tx_pkt_len"] <= good_bytes+oversz_bytes_in
assert tb.stats["stat_tx_pkt_ucast"] == total_pkts
assert tb.stats["stat_tx_pkt_mcast"] == 0
assert tb.stats["stat_tx_pkt_bcast"] == 0
assert tb.stats["stat_tx_pkt_vlan"] == 0
assert tb.stats["stat_tx_pkt_good"] == total_pkts - oversz_pkts
assert tb.stats["stat_tx_pkt_bad"] == oversz_pkts
assert tb.stats["stat_tx_err_oversize"] == oversz_pkts
assert tb.stats["stat_tx_err_user"] == 0
assert tb.stats["stat_tx_err_underflow"] == 0
await RisingEdge(dut.clk)
await RisingEdge(dut.clk)
@@ -285,7 +472,11 @@ if cocotb.SIM_NAME:
factory.add_option("ifg", [12])
factory.generate_tests()
for test in [run_test_underrun, run_test_error]:
for test in [
run_test_underrun,
run_test_error,
run_test_oversize
]:
factory = TestFactory(test)
factory.add_option("ifg", [12])

View File

@@ -45,11 +45,22 @@ logic [CTRL_W-1:0] xgmii_txc;
logic [PTP_TS_W-1:0] ptp_ts;
logic [7:0] cfg_ifg;
logic [15:0] cfg_tx_max_pkt_len;
logic [7:0] cfg_tx_ifg;
logic cfg_tx_enable;
logic [1:0] start_packet;
logic error_underflow;
logic [1:0] tx_start_packet;
logic [3:0] stat_tx_byte;
logic [15:0] stat_tx_pkt_len;
logic stat_tx_pkt_ucast;
logic stat_tx_pkt_mcast;
logic stat_tx_pkt_bcast;
logic stat_tx_pkt_vlan;
logic stat_tx_pkt_good;
logic stat_tx_pkt_bad;
logic stat_tx_err_oversize;
logic stat_tx_err_user;
logic stat_tx_err_underflow;
taxi_axis_xgmii_tx_64 #(
.DATA_W(DATA_W),
@@ -85,14 +96,25 @@ uut (
/*
* Configuration
*/
.cfg_ifg(cfg_ifg),
.cfg_tx_max_pkt_len(cfg_tx_max_pkt_len),
.cfg_tx_ifg(cfg_tx_ifg),
.cfg_tx_enable(cfg_tx_enable),
/*
* Status
*/
.start_packet(start_packet),
.error_underflow(error_underflow)
.tx_start_packet(tx_start_packet),
.stat_tx_byte(stat_tx_byte),
.stat_tx_pkt_len(stat_tx_pkt_len),
.stat_tx_pkt_ucast(stat_tx_pkt_ucast),
.stat_tx_pkt_mcast(stat_tx_pkt_mcast),
.stat_tx_pkt_bcast(stat_tx_pkt_bcast),
.stat_tx_pkt_vlan(stat_tx_pkt_vlan),
.stat_tx_pkt_good(stat_tx_pkt_good),
.stat_tx_pkt_bad(stat_tx_pkt_bad),
.stat_tx_err_oversize(stat_tx_err_oversize),
.stat_tx_err_user(stat_tx_err_user),
.stat_tx_err_underflow(stat_tx_err_underflow)
);
endmodule