example/KC705: Add example design for Xilinx KC705

Signed-off-by: Alex Forencich <alex@alexforencich.com>

example/KC705/fpga/eth_gmii.xdc

@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: MIT
+#
+# Copyright (c) 2025 FPGA Ninja, LLC
+#
+# Authors:
+# - Alex Forencich
+#
+
+# Ethernet constraints
+
+# BUFGMUX outputs (GMII)
+set_clock_groups -physically_exclusive -group clk_mmcm_out -group phy_tx_clk