From 672fc89b5f07165273967c566c1bbfd08fd929cc Mon Sep 17 00:00:00 2001 From: Alex Forencich Date: Mon, 6 Jul 2026 00:55:31 -0700 Subject: [PATCH] eth: Fix 1000BASE-X AN match logic Signed-off-by: Alex Forencich --- src/eth/rtl/taxi_axis_basex_rx_16.sv | 2 +- src/eth/rtl/taxi_axis_basex_rx_8.sv | 2 +- src/eth/rtl/taxi_gmii_basex_dec.sv | 4 ++-- 3 files changed, 4 insertions(+), 4 deletions(-) diff --git a/src/eth/rtl/taxi_axis_basex_rx_16.sv b/src/eth/rtl/taxi_axis_basex_rx_16.sv index 26b5540..4d1639e 100644 --- a/src/eth/rtl/taxi_axis_basex_rx_16.sv +++ b/src/eth/rtl/taxi_axis_basex_rx_16.sv @@ -683,7 +683,7 @@ always_ff @(posedge clk) begin if (AN_EN && input_c_d0_reg) begin rx_an_cfg_reg <= encoded_rx_data; rx_an_cfg_valid_reg <= encoded_rx_data_k == 2'b00; - if (((rx_an_cfg_reg ^ encoded_rx_data) & 16'h4000) == 0) begin + if (((rx_an_cfg_reg ^ encoded_rx_data) & ~16'h4000) == 0) begin an_ability_match_reg <= {an_ability_match_reg[0], 1'b1}; end else begin an_ability_match_reg <= '0; diff --git a/src/eth/rtl/taxi_axis_basex_rx_8.sv b/src/eth/rtl/taxi_axis_basex_rx_8.sv index cc29caa..cffec26 100644 --- a/src/eth/rtl/taxi_axis_basex_rx_8.sv +++ b/src/eth/rtl/taxi_axis_basex_rx_8.sv @@ -550,7 +550,7 @@ always_ff @(posedge clk) begin if (AN_EN && input_c_d1_reg) begin rx_an_cfg_reg[15:8] <= encoded_rx_data; rx_an_cfg_valid_reg <= encoded_rx_data_k == 1'b0; - if (an_cfg_match_reg && ((rx_an_cfg_reg[15:8] ^ encoded_rx_data) & 8'h40) == 0) begin + if (an_cfg_match_reg && ((rx_an_cfg_reg[15:8] ^ encoded_rx_data) & ~8'h40) == 0) begin an_ability_match_reg <= {an_ability_match_reg[0], 1'b1}; end else begin an_ability_match_reg <= '0; diff --git a/src/eth/rtl/taxi_gmii_basex_dec.sv b/src/eth/rtl/taxi_gmii_basex_dec.sv index e6bfab8..e8d6790 100644 --- a/src/eth/rtl/taxi_gmii_basex_dec.sv +++ b/src/eth/rtl/taxi_gmii_basex_dec.sv @@ -210,13 +210,13 @@ always_comb begin c_cyc = 1'b1; end else if (AN_EN && c_cyc) begin if (!odd_cyc) begin - rx_an_cfg_next[7:0] = encoded_rx_data[seg*8 +: 8]; an_cfg_match_next = rx_an_cfg_next[7:0] == encoded_rx_data[seg*8 +: 8]; + rx_an_cfg_next[7:0] = encoded_rx_data[seg*8 +: 8]; an_idle_match_next = '0; end else begin rx_an_cfg_next[15:8] = encoded_rx_data[seg*8 +: 8]; rx_an_cfg_valid_next = 1'b1; - if (an_cfg_match_next && ((rx_an_cfg_next[15:8] ^ encoded_rx_data[seg*8 +: 8]) & 8'h40) == 0) begin + if (an_cfg_match_next && ((rx_an_cfg_next[15:8] ^ encoded_rx_data[seg*8 +: 8]) & ~8'h40) == 0) begin an_ability_match_next = {an_ability_match_next[0], 1'b1}; end else begin an_ability_match_next = '0;