From 7047cb5c4f31569507ec07461b828e31442b1375 Mon Sep 17 00:00:00 2001 From: Alex Forencich Date: Mon, 24 Feb 2025 16:28:59 -0800 Subject: [PATCH] eth: Tie off transceiver control signals during simulation Signed-off-by: Alex Forencich --- example/ADM_PCIE_9V3/fpga/rtl/fpga_core.sv | 2 -- example/KCU105/fpga/rtl/fpga_core.sv | 2 -- example/KR260/fpga/rtl/fpga_core.sv | 2 -- example/VCU108/fpga/rtl/fpga_core.sv | 2 -- example/ZCU102/fpga/rtl/fpga_core.sv | 2 -- example/ZCU106/fpga/rtl/fpga_core.sv | 2 -- example/ZCU111/fpga/rtl/fpga_core.sv | 2 -- rtl/eth/us/taxi_eth_mac_25g_us_ch.sv | 6 ++++++ 8 files changed, 6 insertions(+), 14 deletions(-) diff --git a/example/ADM_PCIE_9V3/fpga/rtl/fpga_core.sv b/example/ADM_PCIE_9V3/fpga/rtl/fpga_core.sv index 6355f75..6c9a0f6 100644 --- a/example/ADM_PCIE_9V3/fpga/rtl/fpga_core.sv +++ b/example/ADM_PCIE_9V3/fpga/rtl/fpga_core.sv @@ -89,8 +89,6 @@ taxi_axis_if #(.DATA_W(64), .ID_W(8)) axis_qsfp_rx[7:0](); if (SIM) begin - assign qsfp_gtpowergood = '1; - assign qsfp_0_mgt_refclk = qsfp_0_mgt_refclk_p; assign qsfp_0_mgt_refclk_int = qsfp_0_mgt_refclk_p; assign qsfp_0_mgt_refclk_bufg = qsfp_0_mgt_refclk_int; diff --git a/example/KCU105/fpga/rtl/fpga_core.sv b/example/KCU105/fpga/rtl/fpga_core.sv index 4de61b6..b3c5e32 100644 --- a/example/KCU105/fpga/rtl/fpga_core.sv +++ b/example/KCU105/fpga/rtl/fpga_core.sv @@ -381,8 +381,6 @@ end else begin : sfp_mac if (SIM) begin - assign sfp_gtpowergood = 1'b1; - assign sfp_mgt_refclk_0 = sfp_mgt_refclk_0_p; assign sfp_mgt_refclk_0_int = sfp_mgt_refclk_0_p; assign sfp_mgt_refclk_0_bufg = sfp_mgt_refclk_0_int; diff --git a/example/KR260/fpga/rtl/fpga_core.sv b/example/KR260/fpga/rtl/fpga_core.sv index fbe44c4..4011581 100644 --- a/example/KR260/fpga/rtl/fpga_core.sv +++ b/example/KR260/fpga/rtl/fpga_core.sv @@ -326,8 +326,6 @@ end else begin : sfp_mac if (SIM) begin - assign sfp_gtpowergood = 1'b1; - assign sfp_mgt_refclk = sfp_mgt_refclk_p; assign sfp_mgt_refclk_int = sfp_mgt_refclk_p; assign sfp_mgt_refclk_bufg = sfp_mgt_refclk_int; diff --git a/example/VCU108/fpga/rtl/fpga_core.sv b/example/VCU108/fpga/rtl/fpga_core.sv index a09275b..331819f 100644 --- a/example/VCU108/fpga/rtl/fpga_core.sv +++ b/example/VCU108/fpga/rtl/fpga_core.sv @@ -225,8 +225,6 @@ taxi_axis_if #(.DATA_W(64), .ID_W(8)) axis_qsfp_rx[3:0](); if (SIM) begin - assign qsfp_gtpowergood = 1'b1; - assign qsfp_mgt_refclk_0 = qsfp_mgt_refclk_0_p; assign qsfp_mgt_refclk_0_int = qsfp_mgt_refclk_0_p; assign qsfp_mgt_refclk_0_bufg = qsfp_mgt_refclk_0_int; diff --git a/example/ZCU102/fpga/rtl/fpga_core.sv b/example/ZCU102/fpga/rtl/fpga_core.sv index 4ce987f..eda75db 100644 --- a/example/ZCU102/fpga/rtl/fpga_core.sv +++ b/example/ZCU102/fpga/rtl/fpga_core.sv @@ -452,8 +452,6 @@ end else begin : sfp_mac if (SIM) begin - assign sfp_gtpowergood = 1'b1; - assign sfp_mgt_refclk_0 = sfp_mgt_refclk_0_p; assign sfp_mgt_refclk_0_int = sfp_mgt_refclk_0_p; assign sfp_mgt_refclk_0_bufg = sfp_mgt_refclk_0_int; diff --git a/example/ZCU106/fpga/rtl/fpga_core.sv b/example/ZCU106/fpga/rtl/fpga_core.sv index 5189f23..58fe4d7 100644 --- a/example/ZCU106/fpga/rtl/fpga_core.sv +++ b/example/ZCU106/fpga/rtl/fpga_core.sv @@ -294,8 +294,6 @@ end else begin : sfp_mac if (SIM) begin - assign sfp_gtpowergood = 1'b1; - assign sfp_mgt_refclk_0 = sfp_mgt_refclk_0_p; assign sfp_mgt_refclk_0_int = sfp_mgt_refclk_0_p; assign sfp_mgt_refclk_0_bufg = sfp_mgt_refclk_0_int; diff --git a/example/ZCU111/fpga/rtl/fpga_core.sv b/example/ZCU111/fpga/rtl/fpga_core.sv index c595c15..33b5557 100644 --- a/example/ZCU111/fpga/rtl/fpga_core.sv +++ b/example/ZCU111/fpga/rtl/fpga_core.sv @@ -130,8 +130,6 @@ taxi_axis_if #(.DATA_W(64), .ID_W(8)) axis_sfp_rx[3:0](); if (SIM) begin - assign sfp_gtpowergood = 1'b1; - assign sfp_mgt_refclk_0 = sfp_mgt_refclk_0_p; assign sfp_mgt_refclk_0_int = sfp_mgt_refclk_0_p; assign sfp_mgt_refclk_0_bufg = sfp_mgt_refclk_0_int; diff --git a/rtl/eth/us/taxi_eth_mac_25g_us_ch.sv b/rtl/eth/us/taxi_eth_mac_25g_us_ch.sv index b860bf0..e0f385f 100644 --- a/rtl/eth/us/taxi_eth_mac_25g_us_ch.sv +++ b/rtl/eth/us/taxi_eth_mac_25g_us_ch.sv @@ -227,6 +227,12 @@ wire [1:0] gt_rxdatavalid; if (SIM) begin : xcvr // simulation (no GT core) + assign xcvr_gtpowergood_out = 1'b1; + + assign xcvr_qpll0lock_out = 1'b1; + assign xcvr_qpll0clk_out = 1'b0; + assign xcvr_qpll0refclk_out = 1'b0; + assign gt_reset_tx_done = !xcvr_ctrl_rst; assign gt_reset_rx_done = !xcvr_ctrl_rst;