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eth: Tie off transceiver control signals during simulation

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Signed-off-by: Alex Forencich <alex@alexforencich.com>
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Alex Forencich
2025-02-24 16:28:59 -08:00
parent 34266fe25d
commit 7047cb5c4f
8 changed files with 6 additions and 14 deletions
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example/ADM_PCIE_9V3/fpga/rtl/fpga_core.sv
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@@ -89,8 +89,6 @@ taxi_axis_if #(.DATA_W(64), .ID_W(8)) axis_qsfp_rx[7:0]();
if (SIM) begin
assign qsfp_gtpowergood = '1;
assign qsfp_0_mgt_refclk = qsfp_0_mgt_refclk_p;
assign qsfp_0_mgt_refclk_int = qsfp_0_mgt_refclk_p;
assign qsfp_0_mgt_refclk_bufg = qsfp_0_mgt_refclk_int;