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example/KC705: Add XFCP to KC705 example design for monitoring and control

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Signed-off-by: Alex Forencich <alex@alexforencich.com>
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Alex Forencich
2025-04-09 17:53:13 -07:00
parent e799e4e488
commit 71a1952dd8
7 changed files with 130 additions and 67 deletions
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example/KC705/fpga/README.md
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@@ -4,10 +4,10 @@
This example design targets the Xilinx KC705 FPGA board.
The design places looped-back MACs on both the BASE-T port as well as the SFP+ cage, as well as a looped-back UART on on the USB UART connection.
The design places looped-back MACs on both the BASE-T port and the SFP+ cage, as well as XFCP on the USB UART for monitoring and control.
* USB UART
* Looped-back UART
* XFCP (921600 baud)
* RJ-45 Ethernet port with Marvell 88E1111 PHY
* Looped-back MAC via GMII
* Looped-back MAC via RGMII
@@ -49,6 +49,4 @@ Also, note that version 1.0 of the KC705 has the SFP+ TX and RX connections pola
Run `make program` to program the board with Vivado.
To test the looped-back UART, use any serial terminal software like minicom, screen, etc. The looped-back UART will echo typed text back without modification.
To test the looped-back MAC, it is recommended to use a network tester like the Viavi T-BERD 5800 that supports basic layer 2 tests with a loopback. Do not connect the looped-back MAC to a network as the reflected packets may cause problems.