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xfcp: Rename signals based on upstream/downstsream port role and data direction to simplify connections

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Signed-off-by: Alex Forencich <alex@alexforencich.com>
This commit is contained in:
Alex Forencich
2025-03-11 18:33:57 -07:00
parent 8d4ad59727
commit 7df14e54e5
12 changed files with 432 additions and 432 deletions
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10
tb/xfcp/taxi_xfcp_if_uart/test_taxi_xfcp_if_uart.py
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@@ -47,8 +47,8 @@ class TB(object):
self.uart_source = UartSource(dut.uart_rxd, baud=baud, bits=8, stop_bits=1)
self.uart_sink = UartSink(dut.uart_txd, baud=baud, bits=8, stop_bits=1)
self.axis_source = AxiStreamSource(AxiStreamBus.from_entity(dut.dn_xfcp_in), dut.clk, dut.rst)
self.axis_sink = AxiStreamSink(AxiStreamBus.from_entity(dut.dn_xfcp_out), dut.clk, dut.rst)
self.dsp_source = AxiStreamSource(AxiStreamBus.from_entity(dut.xfcp_dsp_us), dut.clk, dut.rst)
self.dsp_sink = AxiStreamSink(AxiStreamBus.from_entity(dut.xfcp_dsp_ds), dut.clk, dut.rst)
dut.prescale.setimmediatevalue(int(1/8e-9/baud/8))
@@ -78,7 +78,7 @@ async def run_test_tx(dut, payload_lengths=None, payload_data=None):
pkt.ptype = 1
pkt.payload = test_data
await tb.axis_source.write(pkt.build())
await tb.dsp_source.write(pkt.build())
rx_data = bytearray()
while True:
@@ -114,13 +114,13 @@ async def run_test_rx(dut, payload_lengths=None, payload_data=None):
await tb.uart_source.write(pkt.build_cobs())
rx_frame = await tb.axis_sink.recv()
rx_frame = await tb.dsp_sink.recv()
rx_pkt = XfcpFrame.parse(rx_frame.tdata)
print(rx_pkt)
assert rx_pkt == pkt
assert tb.axis_sink.empty()
assert tb.dsp_sink.empty()
await RisingEdge(dut.clk)
await RisingEdge(dut.clk)

6
tb/xfcp/taxi_xfcp_if_uart/test_taxi_xfcp_if_uart.sv
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@@ -30,7 +30,7 @@ logic rst;
logic uart_rxd;
logic uart_txd;
taxi_axis_if #(.DATA_W(8), .LAST_EN(1), .USER_EN(1), .USER_W(1)) dn_xfcp_in(), dn_xfcp_out();
taxi_axis_if #(.DATA_W(8), .LAST_EN(1), .USER_EN(1), .USER_W(1)) xfcp_dsp_ds(), xfcp_dsp_us();
logic [15:0] prescale;
@@ -51,8 +51,8 @@ uut (
/*
* XFCP downstream port
*/
.dn_xfcp_in(dn_xfcp_in),
.dn_xfcp_out(dn_xfcp_out),
.xfcp_dsp_ds(xfcp_dsp_ds),
.xfcp_dsp_us(xfcp_dsp_us),
/*
* Configuration

20
tb/xfcp/taxi_xfcp_mod_axi/test_taxi_xfcp_mod_axi.py
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@@ -46,20 +46,20 @@ class TB(object):
cocotb.start_soon(Clock(dut.clk, 8, units="ns").start())
self.axis_source = AxiStreamSource(AxiStreamBus.from_entity(dut.up_xfcp_in), dut.clk, dut.rst)
self.axis_sink = AxiStreamSink(AxiStreamBus.from_entity(dut.up_xfcp_out), dut.clk, dut.rst)
self.usp_source = AxiStreamSource(AxiStreamBus.from_entity(dut.xfcp_usp_ds), dut.clk, dut.rst)
self.usp_sink = AxiStreamSink(AxiStreamBus.from_entity(dut.xfcp_usp_us), dut.clk, dut.rst)
self.axi_ram = AxiRam(AxiBus.from_entity(dut.m_axi), dut.clk, dut.rst, size=2**16)
def set_idle_generator(self, generator=None):
if generator:
self.axis_source.set_pause_generator(generator())
self.usp_source.set_pause_generator(generator())
self.axi_ram.write_if.b_channel.set_pause_generator(generator())
self.axi_ram.read_if.r_channel.set_pause_generator(generator())
def set_backpressure_generator(self, generator=None):
if generator:
self.axis_sink.set_pause_generator(generator())
self.usp_sink.set_pause_generator(generator())
self.axi_ram.write_if.aw_channel.set_pause_generator(generator())
self.axi_ram.write_if.w_channel.set_pause_generator(generator())
self.axi_ram.read_if.ar_channel.set_pause_generator(generator())
@@ -101,9 +101,9 @@ async def run_test_write(dut, idle_inserter=None, backpressure_inserter=None):
tb.log.debug("TX packet: %s", pkt)
await tb.axis_source.send(pkt.build())
await tb.usp_source.send(pkt.build())
rx_frame = await tb.axis_sink.recv()
rx_frame = await tb.usp_sink.recv()
rx_pkt = XfcpFrame.parse(rx_frame.tdata)
tb.log.debug("RX packet: %s", rx_pkt)
@@ -146,9 +146,9 @@ async def run_test_read(dut, idle_inserter=None, backpressure_inserter=None):
tb.log.debug("TX packet: %s", pkt)
await tb.axis_source.send(pkt.build())
await tb.usp_source.send(pkt.build())
rx_frame = await tb.axis_sink.recv()
rx_frame = await tb.usp_sink.recv()
rx_pkt = XfcpFrame.parse(rx_frame.tdata)
tb.log.debug("RX packet: %s", rx_pkt)
@@ -174,9 +174,9 @@ async def run_test_id(dut, idle_inserter=None, backpressure_inserter=None):
tb.log.debug("TX packet: %s", pkt)
await tb.axis_source.send(pkt.build())
await tb.usp_source.send(pkt.build())
rx_frame = await tb.axis_sink.recv()
rx_frame = await tb.usp_sink.recv()
rx_pkt = XfcpFrame.parse(rx_frame.tdata)
tb.log.debug("RX packet: %s", rx_pkt)

6
tb/xfcp/taxi_xfcp_mod_axi/test_taxi_xfcp_mod_axi.sv
View File

@@ -29,7 +29,7 @@ module test_taxi_xfcp_mod_axi #
logic clk;
logic rst;
taxi_axis_if #(.DATA_W(8), .LAST_EN(1), .USER_EN(1), .USER_W(1)) up_xfcp_in(), up_xfcp_out();
taxi_axis_if #(.DATA_W(8), .LAST_EN(1), .USER_EN(1), .USER_W(1)) xfcp_usp_ds(), xfcp_usp_us();
taxi_axi_if #(
.DATA_W(AXI_DATA_W),
@@ -47,8 +47,8 @@ uut (
/*
* XFCP upstream port
*/
.up_xfcp_in(up_xfcp_in),
.up_xfcp_out(up_xfcp_out),
.xfcp_usp_ds(xfcp_usp_ds),
.xfcp_usp_us(xfcp_usp_us),
/*
* AXI master interface

20
tb/xfcp/taxi_xfcp_mod_axil/test_taxi_xfcp_mod_axil.py
View File

@@ -46,20 +46,20 @@ class TB(object):
cocotb.start_soon(Clock(dut.clk, 8, units="ns").start())
self.axis_source = AxiStreamSource(AxiStreamBus.from_entity(dut.up_xfcp_in), dut.clk, dut.rst)
self.axis_sink = AxiStreamSink(AxiStreamBus.from_entity(dut.up_xfcp_out), dut.clk, dut.rst)
self.usp_source = AxiStreamSource(AxiStreamBus.from_entity(dut.xfcp_usp_ds), dut.clk, dut.rst)
self.usp_sink = AxiStreamSink(AxiStreamBus.from_entity(dut.xfcp_usp_us), dut.clk, dut.rst)
self.axil_ram = AxiLiteRam(AxiLiteBus.from_entity(dut.m_axil), dut.clk, dut.rst, size=2**16)
def set_idle_generator(self, generator=None):
if generator:
self.axis_source.set_pause_generator(generator())
self.usp_source.set_pause_generator(generator())
self.axil_ram.write_if.b_channel.set_pause_generator(generator())
self.axil_ram.read_if.r_channel.set_pause_generator(generator())
def set_backpressure_generator(self, generator=None):
if generator:
self.axis_sink.set_pause_generator(generator())
self.usp_sink.set_pause_generator(generator())
self.axil_ram.write_if.aw_channel.set_pause_generator(generator())
self.axil_ram.write_if.w_channel.set_pause_generator(generator())
self.axil_ram.read_if.ar_channel.set_pause_generator(generator())
@@ -101,9 +101,9 @@ async def run_test_write(dut, idle_inserter=None, backpressure_inserter=None):
tb.log.debug("TX packet: %s", pkt)
await tb.axis_source.send(pkt.build())
await tb.usp_source.send(pkt.build())
rx_frame = await tb.axis_sink.recv()
rx_frame = await tb.usp_sink.recv()
rx_pkt = XfcpFrame.parse(rx_frame.tdata)
tb.log.debug("RX packet: %s", rx_pkt)
@@ -146,9 +146,9 @@ async def run_test_read(dut, idle_inserter=None, backpressure_inserter=None):
tb.log.debug("TX packet: %s", pkt)
await tb.axis_source.send(pkt.build())
await tb.usp_source.send(pkt.build())
rx_frame = await tb.axis_sink.recv()
rx_frame = await tb.usp_sink.recv()
rx_pkt = XfcpFrame.parse(rx_frame.tdata)
tb.log.debug("RX packet: %s", rx_pkt)
@@ -174,9 +174,9 @@ async def run_test_id(dut, idle_inserter=None, backpressure_inserter=None):
tb.log.debug("TX packet: %s", pkt)
await tb.axis_source.send(pkt.build())
await tb.usp_source.send(pkt.build())
rx_frame = await tb.axis_sink.recv()
rx_frame = await tb.usp_sink.recv()
rx_pkt = XfcpFrame.parse(rx_frame.tdata)
tb.log.debug("RX packet: %s", rx_pkt)

6
tb/xfcp/taxi_xfcp_mod_axil/test_taxi_xfcp_mod_axil.sv
View File

@@ -29,7 +29,7 @@ module test_taxi_xfcp_mod_axil #
logic clk;
logic rst;
taxi_axis_if #(.DATA_W(8), .LAST_EN(1), .USER_EN(1), .USER_W(1)) up_xfcp_in(), up_xfcp_out();
taxi_axis_if #(.DATA_W(8), .LAST_EN(1), .USER_EN(1), .USER_W(1)) xfcp_usp_ds(), xfcp_usp_us();
taxi_axil_if #(
.DATA_W(AXIL_DATA_W),
@@ -47,8 +47,8 @@ uut (
/*
* XFCP upstream port
*/
.up_xfcp_in(up_xfcp_in),
.up_xfcp_out(up_xfcp_out),
.xfcp_usp_ds(xfcp_usp_ds),
.xfcp_usp_us(xfcp_usp_us),
/*
* AXI lite master interface

30
tb/xfcp/taxi_xfcp_switch/test_taxi_xfcp_switch.py
View File

@@ -45,22 +45,22 @@ class TB(object):
cocotb.start_soon(Clock(dut.clk, 8, units="ns").start())
self.up_source = AxiStreamSource(AxiStreamBus.from_entity(dut.up_xfcp_in), dut.clk, dut.rst)
self.up_sink = AxiStreamSink(AxiStreamBus.from_entity(dut.up_xfcp_out), dut.clk, dut.rst)
self.usp_source = AxiStreamSource(AxiStreamBus.from_entity(dut.xfcp_usp_ds), dut.clk, dut.rst)
self.usp_sink = AxiStreamSink(AxiStreamBus.from_entity(dut.xfcp_usp_us), dut.clk, dut.rst)
self.dn_sources = [AxiStreamSource(AxiStreamBus.from_entity(bus), dut.clk, dut.rst) for bus in dut.dn_xfcp_in]
self.dn_sinks = [AxiStreamSink(AxiStreamBus.from_entity(bus), dut.clk, dut.rst) for bus in dut.dn_xfcp_out]
self.dsp_sources = [AxiStreamSource(AxiStreamBus.from_entity(bus), dut.clk, dut.rst) for bus in dut.xfcp_dsp_us]
self.dsp_sinks = [AxiStreamSink(AxiStreamBus.from_entity(bus), dut.clk, dut.rst) for bus in dut.xfcp_dsp_ds]
def set_idle_generator(self, generator=None):
if generator:
self.up_source.set_pause_generator(generator())
for src in self.dn_sources:
self.usp_source.set_pause_generator(generator())
for src in self.dsp_sources:
src.set_pause_generator(generator())
def set_backpressure_generator(self, generator=None):
if generator:
self.up_sink.set_pause_generator(generator())
for snk in self.dn_sinks:
self.usp_sink.set_pause_generator(generator())
for snk in self.dsp_sinks:
snk.set_pause_generator(generator())
async def reset(self):
@@ -91,9 +91,9 @@ async def run_test_downstream(dut, idle_inserter=None, backpressure_inserter=Non
tb.log.debug("TX packet: %s", pkt)
await tb.up_source.send(pkt.build())
await tb.usp_source.send(pkt.build())
rx_frame = await tb.dn_sinks[port].recv()
rx_frame = await tb.dsp_sinks[port].recv()
rx_pkt = XfcpFrame.parse(rx_frame.tdata)
tb.log.debug("RX packet: %s", rx_pkt)
@@ -121,9 +121,9 @@ async def run_test_upstream(dut, idle_inserter=None, backpressure_inserter=None,
tb.log.debug("TX packet: %s", pkt)
await tb.dn_sources[port].send(pkt.build())
await tb.dsp_sources[port].send(pkt.build())
rx_frame = await tb.up_sink.recv()
rx_frame = await tb.usp_sink.recv()
rx_pkt = XfcpFrame.parse(rx_frame.tdata)
tb.log.debug("RX packet: %s", rx_pkt)
@@ -151,9 +151,9 @@ async def run_test_id(dut, idle_inserter=None, backpressure_inserter=None):
tb.log.debug("TX packet: %s", pkt)
await tb.up_source.send(pkt.build())
await tb.usp_source.send(pkt.build())
rx_frame = await tb.up_sink.recv()
rx_frame = await tb.usp_sink.recv()
rx_pkt = XfcpFrame.parse(rx_frame.tdata)
tb.log.debug("RX packet: %s", rx_pkt)
@@ -170,7 +170,7 @@ def cycle_pause():
if cocotb.SIM_NAME:
ports = len(cocotb.top.dn_xfcp_out)
ports = len(cocotb.top.xfcp_dsp_us)
for test in [run_test_downstream, run_test_upstream]:

12
tb/xfcp/taxi_xfcp_switch/test_taxi_xfcp_switch.sv
View File

@@ -26,8 +26,8 @@ module test_taxi_xfcp_switch #
logic clk;
logic rst;
taxi_axis_if #(.DATA_W(8), .LAST_EN(1), .USER_EN(1), .USER_W(1)) up_xfcp_in(), up_xfcp_out();
taxi_axis_if #(.DATA_W(8), .LAST_EN(1), .USER_EN(1), .USER_W(1)) dn_xfcp_in[PORTS](), dn_xfcp_out[PORTS]();
taxi_axis_if #(.DATA_W(8), .LAST_EN(1), .USER_EN(1), .USER_W(1)) xfcp_usp_ds(), xfcp_usp_us();
taxi_axis_if #(.DATA_W(8), .LAST_EN(1), .USER_EN(1), .USER_W(1)) xfcp_dsp_ds[PORTS](), xfcp_dsp_us[PORTS]();
taxi_xfcp_switch #(
.PORTS(PORTS)
@@ -39,14 +39,14 @@ uut (
/*
* XFCP upstream port
*/
.up_xfcp_in(up_xfcp_in),
.up_xfcp_out(up_xfcp_out),
.xfcp_usp_ds(xfcp_usp_ds),
.xfcp_usp_us(xfcp_usp_us),
/*
* XFCP downstream ports
*/
.dn_xfcp_in(dn_xfcp_in),
.dn_xfcp_out(dn_xfcp_out)
.xfcp_dsp_ds(xfcp_dsp_ds),
.xfcp_dsp_us(xfcp_dsp_us)
);
endmodule