mirror of
https://github.com/fpganinja/taxi.git
synced 2026-02-28 05:55:09 -08:00
cndm: Add support for Alveo AU250
Signed-off-by: Alex Forencich <alex@alexforencich.com>
This commit is contained in:
@@ -17,6 +17,12 @@ This design targets the Xilinx Alveo series.
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* PCIe: gen 3 x16 (~128 Gbps)
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* Reference oscillator: 156.25 MHz from Si570
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* 25GBASE-R PHY: Soft PCS with GTY transceivers
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* AU250
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* FPGA: xcu250-fsgd2104-2-e
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* USB UART: FTDI FT4232H
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* PCIe: gen 3 x16 (~128 Gbps)
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* Reference oscillator: 156.25 MHz from Si570
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* 25GBASE-R PHY: Soft PCS with GTY transceivers
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* VCU1525
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* FPGA: xcvu9p-fsgd2104-2L-e
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* USB UART: FTDI FT4232H
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98
src/cndm/board/Alveo/fpga/fpga_AU250/Makefile
Normal file
98
src/cndm/board/Alveo/fpga/fpga_AU250/Makefile
Normal file
@@ -0,0 +1,98 @@
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# SPDX-License-Identifier: MIT
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#
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# Copyright (c) 2025-2026 FPGA Ninja, LLC
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#
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# Authors:
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# - Alex Forencich
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#
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# FPGA settings
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FPGA_PART = xcu250-figd2104-2-e
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FPGA_TOP = fpga
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FPGA_ARCH = virtexuplus
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RTL_DIR = ../rtl
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LIB_DIR = ../lib
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TAXI_SRC_DIR = $(LIB_DIR)/taxi/src
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# Files for synthesis
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SYN_FILES = $(RTL_DIR)/fpga_au200.sv
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SYN_FILES += $(RTL_DIR)/fpga_core.sv
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SYN_FILES += $(TAXI_SRC_DIR)/cndm/rtl/cndm_micro_pcie_us.f
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SYN_FILES += $(TAXI_SRC_DIR)/eth/rtl/us/taxi_eth_mac_25g_us.f
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SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_if_uart.f
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SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_switch.sv
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SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_apb.f
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SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_stats.f
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SYN_FILES += $(TAXI_SRC_DIR)/axis/rtl/taxi_axis_async_fifo.f
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SYN_FILES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_reset.sv
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SYN_FILES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_signal.sv
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SYN_FILES += $(TAXI_SRC_DIR)/io/rtl/taxi_debounce_switch.sv
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SYN_FILES += $(TAXI_SRC_DIR)/pyrite/rtl/pyrite_pcie_us_vpd_qspi.f
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# XDC files
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XDC_FILES = ../fpga_au200.xdc
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XDC_FILES += $(TAXI_SRC_DIR)/eth/syn/vivado/taxi_eth_mac_fifo.tcl
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XDC_FILES += $(TAXI_SRC_DIR)/axis/syn/vivado/taxi_axis_async_fifo.tcl
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XDC_FILES += $(TAXI_SRC_DIR)/ptp/syn/vivado/taxi_ptp_td_leaf.tcl
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XDC_FILES += $(TAXI_SRC_DIR)/ptp/syn/vivado/taxi_ptp_td_phc_regs.tcl
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XDC_FILES += $(TAXI_SRC_DIR)/ptp/syn/vivado/taxi_ptp_td_rel2tod.tcl
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XDC_FILES += $(TAXI_SRC_DIR)/sync/syn/vivado/taxi_sync_reset.tcl
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XDC_FILES += $(TAXI_SRC_DIR)/sync/syn/vivado/taxi_sync_signal.tcl
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# IP
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IP_TCL_FILES = ../ip/pcie4_uscale_plus_0.tcl
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IP_TCL_FILES += $(TAXI_SRC_DIR)/eth/rtl/us/taxi_eth_phy_25g_us_gty_25g_156.tcl
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# Configuration
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CONFIG_TCL_FILES = ./config.tcl
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include ../common/vivado.mk
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program: $(PROJECT).bit
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echo "open_hw_manager" > program.tcl
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echo "connect_hw_server" >> program.tcl
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echo "open_hw_target" >> program.tcl
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echo "current_hw_device [lindex [get_hw_devices] 0]" >> program.tcl
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echo "refresh_hw_device -update_hw_probes false [current_hw_device]" >> program.tcl
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echo "set_property PROGRAM.FILE {$(PROJECT).bit} [current_hw_device]" >> program.tcl
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echo "program_hw_devices [current_hw_device]" >> program.tcl
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echo "exit" >> program.tcl
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vivado -nojournal -nolog -mode batch -source program.tcl
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$(PROJECT).mcs $(PROJECT).prm: $(PROJECT).bit
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echo "write_cfgmem -force -format mcs -size 128 -interface SPIx4 -loadbit {up 0x01002000 $*.bit} -checksum -file $*.mcs" > generate_mcs.tcl
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echo "exit" >> generate_mcs.tcl
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vivado -nojournal -nolog -mode batch -source generate_mcs.tcl
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mkdir -p rev
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COUNT=100; \
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while [ -e rev/$*_rev$$COUNT.bit ]; \
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do COUNT=$$((COUNT+1)); done; \
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COUNT=$$((COUNT-1)); \
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for x in .mcs .prm; \
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do cp $*$$x rev/$*_rev$$COUNT$$x; \
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echo "Output: rev/$*_rev$$COUNT$$x"; done;
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flash: $(PROJECT).mcs $(PROJECT).prm
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echo "open_hw_manager" > flash.tcl
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echo "connect_hw_server" >> flash.tcl
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echo "open_hw_target" >> flash.tcl
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echo "current_hw_device [lindex [get_hw_devices] 0]" >> flash.tcl
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echo "refresh_hw_device -update_hw_probes false [current_hw_device]" >> flash.tcl
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echo "create_hw_cfgmem -hw_device [current_hw_device] [lindex [get_cfgmem_parts {mt25qu01g-spi-x1_x2_x4}] 0]" >> flash.tcl
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echo "current_hw_cfgmem -hw_device [current_hw_device] [get_property PROGRAM.HW_CFGMEM [current_hw_device]]" >> flash.tcl
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echo "set_property PROGRAM.FILES [list \"$(PROJECT).mcs\"] [current_hw_cfgmem]" >> flash.tcl
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echo "set_property PROGRAM.PRM_FILES [list \"$(PROJECT).prm\"] [current_hw_cfgmem]" >> flash.tcl
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echo "set_property PROGRAM.ERASE 1 [current_hw_cfgmem]" >> flash.tcl
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echo "set_property PROGRAM.CFG_PROGRAM 1 [current_hw_cfgmem]" >> flash.tcl
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echo "set_property PROGRAM.VERIFY 1 [current_hw_cfgmem]" >> flash.tcl
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echo "set_property PROGRAM.CHECKSUM 0 [current_hw_cfgmem]" >> flash.tcl
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echo "set_property PROGRAM.ADDRESS_RANGE {use_file} [current_hw_cfgmem]" >> flash.tcl
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echo "set_property PROGRAM.UNUSED_PIN_TERMINATION {pull-none} [current_hw_cfgmem]" >> flash.tcl
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echo "create_hw_bitstream -hw_device [current_hw_device] [get_property PROGRAM.HW_CFGMEM_BITFILE [current_hw_device]]" >> flash.tcl
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echo "program_hw_devices [current_hw_device]" >> flash.tcl
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echo "refresh_hw_device [current_hw_device]" >> flash.tcl
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echo "program_hw_cfgmem -hw_cfgmem [current_hw_cfgmem]" >> flash.tcl
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echo "boot_hw_device [current_hw_device]" >> flash.tcl
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echo "exit" >> flash.tcl
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vivado -nojournal -nolog -mode batch -source flash.tcl
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131
src/cndm/board/Alveo/fpga/fpga_AU250/config.tcl
Normal file
131
src/cndm/board/Alveo/fpga/fpga_AU250/config.tcl
Normal file
@@ -0,0 +1,131 @@
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# SPDX-License-Identifier: MIT
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#
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# Copyright (c) 2025-2026 FPGA Ninja, LLC
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#
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# Authors:
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# - Alex Forencich
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#
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set params [dict create]
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# collect build information
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set build_date [clock seconds]
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set git_hash 00000000
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set git_tag ""
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if { [catch {set git_hash [exec git rev-parse --short=8 HEAD]}] } {
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puts "Error running git or project not under version control"
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}
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if { [catch {set git_tag [exec git describe --tags HEAD]}] } {
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puts "Error running git, project not under version control, or no tag found"
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}
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puts "Build date: ${build_date}"
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puts "Git hash: ${git_hash}"
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puts "Git tag: ${git_tag}"
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if { ! [regsub {^.*(\d+\.\d+\.\d+([\.-]\d+)?).*$} $git_tag {\1} tag_ver ] } {
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puts "Failed to extract version from git tag"
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set tag_ver 0.0.1
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}
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puts "Tag version: ${tag_ver}"
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# FW and board IDs
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set fpga_id [expr 0x4B57093]
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set fw_id [expr 0x0000C001]
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set fw_ver $tag_ver
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set board_vendor_id [expr 0x10ee]
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set board_device_id [expr 0x90fa]
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set board_ver 1.0
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set release_info [expr 0x00000000]
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# PCIe IDs
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set pcie_vendor_id [expr 0x1234]
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set pcie_device_id [expr 0xC001]
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set pcie_class_code [expr 0x020000]
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set pcie_revision_id [expr 0x00]
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set pcie_subsystem_device_id $board_device_id
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set pcie_subsystem_vendor_id $board_vendor_id
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# FW ID
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dict set params FPGA_ID [format "32'h%08x" $fpga_id]
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dict set params FW_ID [format "32'h%08x" $fw_id]
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dict set params FW_VER [format "32'h%03x%02x%03x" {*}[split $fw_ver .-] 0 0 0]
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dict set params BOARD_ID [format "32'h%04x%04x" $board_vendor_id $board_device_id]
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dict set params BOARD_VER [format "32'h%03x%02x%03x" {*}[split $board_ver .-] 0 0 0]
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dict set params BUILD_DATE "32'd${build_date}"
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dict set params GIT_HASH "32'h${git_hash}"
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dict set params RELEASE_INFO [format "32'h%08x" $release_info]
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# PTP configuration
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dict set params PTP_TS_EN "1"
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# AXI lite interface configuration (control)
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dict set params AXIL_CTRL_DATA_W "32"
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dict set params AXIL_CTRL_ADDR_W "24"
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# MAC configuration
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dict set params CFG_LOW_LATENCY "1"
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dict set params COMBINED_MAC_PCS "1"
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dict set params MAC_DATA_W "64"
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# PCIe IP core settings
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set pcie [get_ips pcie4_uscale_plus_0]
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# configure BAR settings
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proc configure_bar {pcie pf bar aperture} {
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set size_list {Bytes Kilobytes Megabytes Gigabytes Terabytes Petabytes Exabytes}
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for { set i 0 } { $i < [llength $size_list] } { incr i } {
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set scale [lindex $size_list $i]
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if {$aperture > 0 && $aperture < ($i+1)*10} {
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set size [expr 1 << $aperture - ($i*10)]
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puts "${pcie} PF${pf} BAR${bar}: aperture ${aperture} bits ($size $scale)"
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set pcie_config [dict create]
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dict set pcie_config "CONFIG.pf${pf}_bar${bar}_enabled" {true}
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dict set pcie_config "CONFIG.pf${pf}_bar${bar}_type" {Memory}
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dict set pcie_config "CONFIG.pf${pf}_bar${bar}_64bit" {true}
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dict set pcie_config "CONFIG.pf${pf}_bar${bar}_prefetchable" {true}
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dict set pcie_config "CONFIG.pf${pf}_bar${bar}_scale" $scale
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dict set pcie_config "CONFIG.pf${pf}_bar${bar}_size" $size
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set_property -dict $pcie_config $pcie
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return
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}
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}
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puts "${pcie} PF${pf} BAR${bar}: disabled"
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set_property "CONFIG.pf${pf}_bar${bar}_enabled" {false} $pcie
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}
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# Control BAR (BAR 0)
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configure_bar $pcie 0 0 [dict get $params AXIL_CTRL_ADDR_W]
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# PCIe IP core configuration
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set pcie_config [dict create]
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# PCIe IDs
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dict set pcie_config "CONFIG.vendor_id" [format "%04x" $pcie_vendor_id]
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dict set pcie_config "CONFIG.PF0_DEVICE_ID" [format "%04x" $pcie_device_id]
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dict set pcie_config "CONFIG.PF0_CLASS_CODE" [format "%06x" $pcie_class_code]
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dict set pcie_config "CONFIG.PF0_REVISION_ID" [format "%02x" $pcie_revision_id]
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dict set pcie_config "CONFIG.PF0_SUBSYSTEM_VENDOR_ID" [format "%04x" $pcie_subsystem_vendor_id]
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dict set pcie_config "CONFIG.PF0_SUBSYSTEM_ID" [format "%04x" $pcie_subsystem_device_id]
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# MSI
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dict set pcie_config "CONFIG.pf0_msi_enabled" {true}
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set_property -dict $pcie_config $pcie
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# apply parameters to top-level
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set param_list {}
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dict for {name value} $params {
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lappend param_list $name=$value
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}
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set_property generic $param_list [get_filesets sources_1]
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98
src/cndm/board/Alveo/fpga/fpga_AU250_10g/Makefile
Normal file
98
src/cndm/board/Alveo/fpga/fpga_AU250_10g/Makefile
Normal file
@@ -0,0 +1,98 @@
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# SPDX-License-Identifier: MIT
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#
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# Copyright (c) 2025-2026 FPGA Ninja, LLC
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#
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# Authors:
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# - Alex Forencich
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#
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# FPGA settings
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FPGA_PART = xcu250-figd2104-2-e
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FPGA_TOP = fpga
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FPGA_ARCH = virtexuplus
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RTL_DIR = ../rtl
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LIB_DIR = ../lib
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TAXI_SRC_DIR = $(LIB_DIR)/taxi/src
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# Files for synthesis
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SYN_FILES = $(RTL_DIR)/fpga_au200.sv
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SYN_FILES += $(RTL_DIR)/fpga_core.sv
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SYN_FILES += $(TAXI_SRC_DIR)/cndm/rtl/cndm_micro_pcie_us.f
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SYN_FILES += $(TAXI_SRC_DIR)/eth/rtl/us/taxi_eth_mac_25g_us.f
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SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_if_uart.f
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SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_switch.sv
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SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_apb.f
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SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_stats.f
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SYN_FILES += $(TAXI_SRC_DIR)/axis/rtl/taxi_axis_async_fifo.f
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SYN_FILES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_reset.sv
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SYN_FILES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_signal.sv
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SYN_FILES += $(TAXI_SRC_DIR)/io/rtl/taxi_debounce_switch.sv
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SYN_FILES += $(TAXI_SRC_DIR)/pyrite/rtl/pyrite_pcie_us_vpd_qspi.f
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# XDC files
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XDC_FILES = ../fpga_au200.xdc
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XDC_FILES += $(TAXI_SRC_DIR)/eth/syn/vivado/taxi_eth_mac_fifo.tcl
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XDC_FILES += $(TAXI_SRC_DIR)/axis/syn/vivado/taxi_axis_async_fifo.tcl
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XDC_FILES += $(TAXI_SRC_DIR)/ptp/syn/vivado/taxi_ptp_td_leaf.tcl
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XDC_FILES += $(TAXI_SRC_DIR)/ptp/syn/vivado/taxi_ptp_td_phc_regs.tcl
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XDC_FILES += $(TAXI_SRC_DIR)/ptp/syn/vivado/taxi_ptp_td_rel2tod.tcl
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XDC_FILES += $(TAXI_SRC_DIR)/sync/syn/vivado/taxi_sync_reset.tcl
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XDC_FILES += $(TAXI_SRC_DIR)/sync/syn/vivado/taxi_sync_signal.tcl
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# IP
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IP_TCL_FILES = ../ip/pcie4_uscale_plus_0.tcl
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IP_TCL_FILES += $(TAXI_SRC_DIR)/eth/rtl/us/taxi_eth_phy_10g_us_gty_156.tcl
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# Configuration
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CONFIG_TCL_FILES = ./config.tcl
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include ../common/vivado.mk
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program: $(PROJECT).bit
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echo "open_hw_manager" > program.tcl
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echo "connect_hw_server" >> program.tcl
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echo "open_hw_target" >> program.tcl
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echo "current_hw_device [lindex [get_hw_devices] 0]" >> program.tcl
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echo "refresh_hw_device -update_hw_probes false [current_hw_device]" >> program.tcl
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echo "set_property PROGRAM.FILE {$(PROJECT).bit} [current_hw_device]" >> program.tcl
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echo "program_hw_devices [current_hw_device]" >> program.tcl
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echo "exit" >> program.tcl
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vivado -nojournal -nolog -mode batch -source program.tcl
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$(PROJECT).mcs $(PROJECT).prm: $(PROJECT).bit
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echo "write_cfgmem -force -format mcs -size 128 -interface SPIx4 -loadbit {up 0x01002000 $*.bit} -checksum -file $*.mcs" > generate_mcs.tcl
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echo "exit" >> generate_mcs.tcl
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vivado -nojournal -nolog -mode batch -source generate_mcs.tcl
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mkdir -p rev
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COUNT=100; \
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while [ -e rev/$*_rev$$COUNT.bit ]; \
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do COUNT=$$((COUNT+1)); done; \
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COUNT=$$((COUNT-1)); \
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for x in .mcs .prm; \
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do cp $*$$x rev/$*_rev$$COUNT$$x; \
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echo "Output: rev/$*_rev$$COUNT$$x"; done;
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flash: $(PROJECT).mcs $(PROJECT).prm
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echo "open_hw_manager" > flash.tcl
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echo "connect_hw_server" >> flash.tcl
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echo "open_hw_target" >> flash.tcl
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echo "current_hw_device [lindex [get_hw_devices] 0]" >> flash.tcl
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echo "refresh_hw_device -update_hw_probes false [current_hw_device]" >> flash.tcl
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echo "create_hw_cfgmem -hw_device [current_hw_device] [lindex [get_cfgmem_parts {mt25qu01g-spi-x1_x2_x4}] 0]" >> flash.tcl
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echo "current_hw_cfgmem -hw_device [current_hw_device] [get_property PROGRAM.HW_CFGMEM [current_hw_device]]" >> flash.tcl
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echo "set_property PROGRAM.FILES [list \"$(PROJECT).mcs\"] [current_hw_cfgmem]" >> flash.tcl
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echo "set_property PROGRAM.PRM_FILES [list \"$(PROJECT).prm\"] [current_hw_cfgmem]" >> flash.tcl
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echo "set_property PROGRAM.ERASE 1 [current_hw_cfgmem]" >> flash.tcl
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echo "set_property PROGRAM.CFG_PROGRAM 1 [current_hw_cfgmem]" >> flash.tcl
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echo "set_property PROGRAM.VERIFY 1 [current_hw_cfgmem]" >> flash.tcl
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echo "set_property PROGRAM.CHECKSUM 0 [current_hw_cfgmem]" >> flash.tcl
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echo "set_property PROGRAM.ADDRESS_RANGE {use_file} [current_hw_cfgmem]" >> flash.tcl
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echo "set_property PROGRAM.UNUSED_PIN_TERMINATION {pull-none} [current_hw_cfgmem]" >> flash.tcl
|
||||
echo "create_hw_bitstream -hw_device [current_hw_device] [get_property PROGRAM.HW_CFGMEM_BITFILE [current_hw_device]]" >> flash.tcl
|
||||
echo "program_hw_devices [current_hw_device]" >> flash.tcl
|
||||
echo "refresh_hw_device [current_hw_device]" >> flash.tcl
|
||||
echo "program_hw_cfgmem -hw_cfgmem [current_hw_cfgmem]" >> flash.tcl
|
||||
echo "boot_hw_device [current_hw_device]" >> flash.tcl
|
||||
echo "exit" >> flash.tcl
|
||||
vivado -nojournal -nolog -mode batch -source flash.tcl
|
||||
131
src/cndm/board/Alveo/fpga/fpga_AU250_10g/config.tcl
Normal file
131
src/cndm/board/Alveo/fpga/fpga_AU250_10g/config.tcl
Normal file
@@ -0,0 +1,131 @@
|
||||
# SPDX-License-Identifier: MIT
|
||||
#
|
||||
# Copyright (c) 2025-2026 FPGA Ninja, LLC
|
||||
#
|
||||
# Authors:
|
||||
# - Alex Forencich
|
||||
#
|
||||
|
||||
set params [dict create]
|
||||
|
||||
# collect build information
|
||||
set build_date [clock seconds]
|
||||
set git_hash 00000000
|
||||
set git_tag ""
|
||||
|
||||
if { [catch {set git_hash [exec git rev-parse --short=8 HEAD]}] } {
|
||||
puts "Error running git or project not under version control"
|
||||
}
|
||||
|
||||
if { [catch {set git_tag [exec git describe --tags HEAD]}] } {
|
||||
puts "Error running git, project not under version control, or no tag found"
|
||||
}
|
||||
|
||||
puts "Build date: ${build_date}"
|
||||
puts "Git hash: ${git_hash}"
|
||||
puts "Git tag: ${git_tag}"
|
||||
|
||||
if { ! [regsub {^.*(\d+\.\d+\.\d+([\.-]\d+)?).*$} $git_tag {\1} tag_ver ] } {
|
||||
puts "Failed to extract version from git tag"
|
||||
set tag_ver 0.0.1
|
||||
}
|
||||
|
||||
puts "Tag version: ${tag_ver}"
|
||||
|
||||
# FW and board IDs
|
||||
set fpga_id [expr 0x4B57093]
|
||||
set fw_id [expr 0x0000C001]
|
||||
set fw_ver $tag_ver
|
||||
set board_vendor_id [expr 0x10ee]
|
||||
set board_device_id [expr 0x90fa]
|
||||
set board_ver 1.0
|
||||
set release_info [expr 0x00000000]
|
||||
|
||||
# PCIe IDs
|
||||
set pcie_vendor_id [expr 0x1234]
|
||||
set pcie_device_id [expr 0xC001]
|
||||
set pcie_class_code [expr 0x020000]
|
||||
set pcie_revision_id [expr 0x00]
|
||||
set pcie_subsystem_device_id $board_device_id
|
||||
set pcie_subsystem_vendor_id $board_vendor_id
|
||||
|
||||
# FW ID
|
||||
dict set params FPGA_ID [format "32'h%08x" $fpga_id]
|
||||
dict set params FW_ID [format "32'h%08x" $fw_id]
|
||||
dict set params FW_VER [format "32'h%03x%02x%03x" {*}[split $fw_ver .-] 0 0 0]
|
||||
dict set params BOARD_ID [format "32'h%04x%04x" $board_vendor_id $board_device_id]
|
||||
dict set params BOARD_VER [format "32'h%03x%02x%03x" {*}[split $board_ver .-] 0 0 0]
|
||||
dict set params BUILD_DATE "32'd${build_date}"
|
||||
dict set params GIT_HASH "32'h${git_hash}"
|
||||
dict set params RELEASE_INFO [format "32'h%08x" $release_info]
|
||||
|
||||
# PTP configuration
|
||||
dict set params PTP_TS_EN "1"
|
||||
|
||||
# AXI lite interface configuration (control)
|
||||
dict set params AXIL_CTRL_DATA_W "32"
|
||||
dict set params AXIL_CTRL_ADDR_W "24"
|
||||
|
||||
# MAC configuration
|
||||
dict set params CFG_LOW_LATENCY "1"
|
||||
dict set params COMBINED_MAC_PCS "1"
|
||||
dict set params MAC_DATA_W "32"
|
||||
|
||||
# PCIe IP core settings
|
||||
set pcie [get_ips pcie4_uscale_plus_0]
|
||||
|
||||
# configure BAR settings
|
||||
proc configure_bar {pcie pf bar aperture} {
|
||||
set size_list {Bytes Kilobytes Megabytes Gigabytes Terabytes Petabytes Exabytes}
|
||||
for { set i 0 } { $i < [llength $size_list] } { incr i } {
|
||||
set scale [lindex $size_list $i]
|
||||
|
||||
if {$aperture > 0 && $aperture < ($i+1)*10} {
|
||||
set size [expr 1 << $aperture - ($i*10)]
|
||||
|
||||
puts "${pcie} PF${pf} BAR${bar}: aperture ${aperture} bits ($size $scale)"
|
||||
|
||||
set pcie_config [dict create]
|
||||
|
||||
dict set pcie_config "CONFIG.pf${pf}_bar${bar}_enabled" {true}
|
||||
dict set pcie_config "CONFIG.pf${pf}_bar${bar}_type" {Memory}
|
||||
dict set pcie_config "CONFIG.pf${pf}_bar${bar}_64bit" {true}
|
||||
dict set pcie_config "CONFIG.pf${pf}_bar${bar}_prefetchable" {true}
|
||||
dict set pcie_config "CONFIG.pf${pf}_bar${bar}_scale" $scale
|
||||
dict set pcie_config "CONFIG.pf${pf}_bar${bar}_size" $size
|
||||
|
||||
set_property -dict $pcie_config $pcie
|
||||
|
||||
return
|
||||
}
|
||||
}
|
||||
puts "${pcie} PF${pf} BAR${bar}: disabled"
|
||||
set_property "CONFIG.pf${pf}_bar${bar}_enabled" {false} $pcie
|
||||
}
|
||||
|
||||
# Control BAR (BAR 0)
|
||||
configure_bar $pcie 0 0 [dict get $params AXIL_CTRL_ADDR_W]
|
||||
|
||||
# PCIe IP core configuration
|
||||
set pcie_config [dict create]
|
||||
|
||||
# PCIe IDs
|
||||
dict set pcie_config "CONFIG.vendor_id" [format "%04x" $pcie_vendor_id]
|
||||
dict set pcie_config "CONFIG.PF0_DEVICE_ID" [format "%04x" $pcie_device_id]
|
||||
dict set pcie_config "CONFIG.PF0_CLASS_CODE" [format "%06x" $pcie_class_code]
|
||||
dict set pcie_config "CONFIG.PF0_REVISION_ID" [format "%02x" $pcie_revision_id]
|
||||
dict set pcie_config "CONFIG.PF0_SUBSYSTEM_VENDOR_ID" [format "%04x" $pcie_subsystem_vendor_id]
|
||||
dict set pcie_config "CONFIG.PF0_SUBSYSTEM_ID" [format "%04x" $pcie_subsystem_device_id]
|
||||
|
||||
# MSI
|
||||
dict set pcie_config "CONFIG.pf0_msi_enabled" {true}
|
||||
|
||||
set_property -dict $pcie_config $pcie
|
||||
|
||||
# apply parameters to top-level
|
||||
set param_list {}
|
||||
dict for {name value} $params {
|
||||
lappend param_list $name=$value
|
||||
}
|
||||
|
||||
set_property generic $param_list [get_filesets sources_1]
|
||||
Reference in New Issue
Block a user