dma: Add AXI stream sink DMA client module and testbench

Signed-off-by: Alex Forencich <alex@alexforencich.com>
2025-12-07 16:28:40 -08:00 · 2025-11-03 21:30:55 -08:00
parent 5663572421
commit 851919f16f
6 changed files with 979 additions and 0 deletions
--- a/README.md
+++ b/README.md
@@ -65,6 +65,7 @@ To facilitate the dual-license model, contributions to the project can only be a
    *  SV interface for DMA descriptors
    *  AXI central DMA
    *  AXI streaming DMA
+    *  DMA client for AXI stream
    *  Segmented SDP RAM
    *  Segmented dual-clock SDP RAM
 *  Ethernet