From 85281bb5aa609fa0eda8aa0381b1b268f4242716 Mon Sep 17 00:00:00 2001 From: Alex Forencich Date: Mon, 6 Jul 2026 17:44:18 -0700 Subject: [PATCH] eth: Update example designs Signed-off-by: Alex Forencich --- src/eth/example/KCU105/fpga/rtl/fpga_core.sv | 9 ++++++++- src/eth/example/ZCU102/fpga/rtl/fpga_core.sv | 9 ++++++++- src/eth/example/ZCU106/fpga/rtl/fpga_core.sv | 9 ++++++++- 3 files changed, 24 insertions(+), 3 deletions(-) diff --git a/src/eth/example/KCU105/fpga/rtl/fpga_core.sv b/src/eth/example/KCU105/fpga/rtl/fpga_core.sv index 8df3fec..d23c318 100644 --- a/src/eth/example/KCU105/fpga/rtl/fpga_core.sv +++ b/src/eth/example/KCU105/fpga/rtl/fpga_core.sv @@ -412,6 +412,7 @@ if (SFP_RATE == 0) begin : sfp_mac .GT_TYPE("GTH"), // PHY parameters + .SGMII_EN(1'b1), .AN_EN(1'b1), .DIC_EN(1'b1), .PTP_TS_EN(1'b0), @@ -496,13 +497,19 @@ if (SFP_RATE == 0) begin : sfp_mac .an_restart('{2{1'b0}}), .an_speedup('{2{1'b0}}), .an_timeout_en('{2{1'b1}}), + .an_sgmii_en('{2{1'b0}}), + .an_sgmii_auto('{2{1'b1}}), .an_intr(), .an_running(), .an_complete(), .an_timeout(), - .an_adv_ability('{2{16'h0020}}), + .an_sgmii_mode(), + .an_adv_ability_basex('{2{16'h0020}}), + .an_adv_ability_sgmii('{2{16'h0001}}), .an_lp_adv_ability(), .an_lp_remote_fault(), + .an_lp_sgmii_link(), + .an_lp_sgmii_speed(), .an_res_full_duplex(), .an_res_tx_pause(), .an_res_rx_pause(), diff --git a/src/eth/example/ZCU102/fpga/rtl/fpga_core.sv b/src/eth/example/ZCU102/fpga/rtl/fpga_core.sv index c00fdbe..9f98802 100644 --- a/src/eth/example/ZCU102/fpga/rtl/fpga_core.sv +++ b/src/eth/example/ZCU102/fpga/rtl/fpga_core.sv @@ -279,6 +279,7 @@ if (SFP_RATE == 0) begin : sfp_mac // PHY parameters .COMBINED_MAC_PCS(COMBINED_MAC_PCS), + .SGMII_EN(1'b1), .AN_EN(1'b1), .DIC_EN(1'b1), .PTP_TS_EN(1'b0), @@ -362,13 +363,19 @@ if (SFP_RATE == 0) begin : sfp_mac .an_restart('{4{1'b0}}), .an_speedup('{4{1'b0}}), .an_timeout_en('{4{1'b1}}), + .an_sgmii_en('{4{1'b0}}), + .an_sgmii_auto('{4{1'b1}}), .an_intr(), .an_running(), .an_complete(), .an_timeout(), - .an_adv_ability('{4{16'h0020}}), + .an_sgmii_mode(), + .an_adv_ability_basex('{4{16'h0020}}), + .an_adv_ability_sgmii('{4{16'h0001}}), .an_lp_adv_ability(), .an_lp_remote_fault(), + .an_lp_sgmii_link(), + .an_lp_sgmii_speed(), .an_res_full_duplex(), .an_res_tx_pause(), .an_res_rx_pause(), diff --git a/src/eth/example/ZCU106/fpga/rtl/fpga_core.sv b/src/eth/example/ZCU106/fpga/rtl/fpga_core.sv index d5ad276..f7509e1 100644 --- a/src/eth/example/ZCU106/fpga/rtl/fpga_core.sv +++ b/src/eth/example/ZCU106/fpga/rtl/fpga_core.sv @@ -279,6 +279,7 @@ if (SFP_RATE == 0) begin : sfp_mac // PHY parameters .COMBINED_MAC_PCS(COMBINED_MAC_PCS), + .SGMII_EN(1'b1), .AN_EN(1'b1), .DIC_EN(1'b1), .PTP_TS_EN(1'b0), @@ -363,13 +364,19 @@ if (SFP_RATE == 0) begin : sfp_mac .an_restart('{2{1'b0}}), .an_speedup('{2{1'b0}}), .an_timeout_en('{2{1'b1}}), + .an_sgmii_en('{2{1'b0}}), + .an_sgmii_auto('{2{1'b1}}), .an_intr(), .an_running(), .an_complete(), .an_timeout(), - .an_adv_ability('{2{16'h0020}}), + .an_sgmii_mode(), + .an_adv_ability_basex('{2{16'h0020}}), + .an_adv_ability_sgmii('{2{16'h0001}}), .an_lp_adv_ability(), .an_lp_remote_fault(), + .an_lp_sgmii_link(), + .an_lp_sgmii_speed(), .an_res_full_duplex(), .an_res_tx_pause(), .an_res_rx_pause(),