From 89bb6725247561ba3872e0f1777dd8878a4ce8c0 Mon Sep 17 00:00:00 2001 From: Alex Forencich Date: Fri, 7 Aug 2026 23:20:27 -0700 Subject: [PATCH] hip: Integrate usrclk active logic Signed-off-by: Alex Forencich --- src/hip/rtl/us/taxi_gt_rx_reset.sv | 22 +++++++++++++++++----- src/hip/rtl/us/taxi_gt_tx_reset.sv | 20 ++++++++++++++++---- 2 files changed, 33 insertions(+), 9 deletions(-) diff --git a/src/hip/rtl/us/taxi_gt_rx_reset.sv b/src/hip/rtl/us/taxi_gt_rx_reset.sv index c88877a..52e06de 100644 --- a/src/hip/rtl/us/taxi_gt_rx_reset.sv +++ b/src/hip/rtl/us/taxi_gt_rx_reset.sv @@ -17,9 +17,9 @@ Authors: */ module taxi_gt_rx_reset # ( - parameter GT_RX_PD = 1'b0, - parameter GT_RX_QPLL_SEL = 1'b0, - parameter GT_RX_LPM_EN = 1'b0, + parameter logic GT_RX_PD = 1'b0, + parameter logic GT_RX_QPLL_SEL = 1'b0, + parameter logic GT_RX_LPM_EN = 1'b0, parameter CNT_W = 8, parameter CDR_CNT_W = 20 ) @@ -34,7 +34,7 @@ module taxi_gt_rx_reset # output wire logic gt_rx_pd_out, output wire logic gt_rx_reset_out, input wire logic gt_rx_reset_done_in, - input wire logic gt_userclk_rx_active_in, + output wire logic gt_userclk_rx_active_out, output wire logic gt_rx_pma_reset_out, output wire logic gt_rx_dfe_lpm_reset_out, output wire logic gt_rx_eyescan_reset_out, @@ -79,6 +79,18 @@ logic gt_rx_pd_reg = GT_RX_PD; logic gt_rx_qpll_sel_reg = GT_RX_QPLL_SEL; logic gt_rx_lpm_en_reg = GT_RX_LPM_EN; +wire gt_userclk_rx_active_n; +assign gt_userclk_rx_active_out = !gt_userclk_rx_active_n; + +taxi_sync_reset #( + .N(4) +) +gt_userclk_rx_active_sync_inst ( + .clk(gt_rxusrclk2), + .rst(gt_rx_reset_reg), + .out(gt_userclk_rx_active_n) +); + wire gt_rx_reset_done_sync; wire gt_rx_pma_reset_done_sync; wire gt_rx_prgdiv_reset_done_sync; @@ -91,7 +103,7 @@ taxi_sync_signal #( ) gt_status_sync_inst ( .clk(clk), - .in({gt_rx_reset_done_in, gt_rx_pma_reset_done_in, gt_rx_prgdiv_reset_done_in, gt_userclk_rx_active_in, gt_rx_cdr_lock_in}), + .in({gt_rx_reset_done_in, gt_rx_pma_reset_done_in, gt_rx_prgdiv_reset_done_in, gt_userclk_rx_active_out, gt_rx_cdr_lock_in}), .out({gt_rx_reset_done_sync, gt_rx_pma_reset_done_sync, gt_rx_prgdiv_reset_done_sync, gt_userclk_rx_active_sync, gt_rx_cdr_lock_sync}) ); diff --git a/src/hip/rtl/us/taxi_gt_tx_reset.sv b/src/hip/rtl/us/taxi_gt_tx_reset.sv index 887b325..fa81d63 100644 --- a/src/hip/rtl/us/taxi_gt_tx_reset.sv +++ b/src/hip/rtl/us/taxi_gt_tx_reset.sv @@ -17,8 +17,8 @@ Authors: */ module taxi_gt_tx_reset # ( - parameter GT_TX_PD = 1'b0, - parameter GT_TX_QPLL_SEL = 1'b0, + parameter logic GT_TX_PD = 1'b0, + parameter logic GT_TX_QPLL_SEL = 1'b0, parameter CNT_W = 8 ) ( @@ -32,7 +32,7 @@ module taxi_gt_tx_reset # output wire logic gt_tx_pd_out, output wire logic gt_tx_reset_out, input wire logic gt_tx_reset_done_in, - input wire logic gt_userclk_tx_active_in, + output wire logic gt_userclk_tx_active_out, output wire logic gt_tx_pma_reset_out, output wire logic gt_tx_pcs_reset_out, input wire logic gt_tx_pma_reset_done_in, @@ -67,6 +67,18 @@ logic gt_tx_pd_reg = GT_TX_PD; logic gt_tx_qpll_sel_reg = GT_TX_QPLL_SEL; +wire gt_userclk_tx_active_n; +assign gt_userclk_tx_active_out = !gt_userclk_tx_active_n; + +taxi_sync_reset #( + .N(4) +) +gt_userclk_tx_active_sync_inst ( + .clk(gt_txusrclk2), + .rst(gt_tx_reset_reg), + .out(gt_userclk_tx_active_n) +); + wire gt_tx_reset_done_sync; wire gt_tx_pma_reset_done_sync; wire gt_tx_prgdiv_reset_done_sync; @@ -78,7 +90,7 @@ taxi_sync_signal #( ) gt_status_sync_inst ( .clk(clk), - .in({gt_tx_reset_done_in, gt_tx_pma_reset_done_in, gt_tx_prgdiv_reset_done_in, gt_userclk_tx_active_in}), + .in({gt_tx_reset_done_in, gt_tx_pma_reset_done_in, gt_tx_prgdiv_reset_done_in, gt_userclk_tx_active_out}), .out({gt_tx_reset_done_sync, gt_tx_pma_reset_done_sync, gt_tx_prgdiv_reset_done_sync, gt_userclk_tx_active_sync}) );