mirror of
https://github.com/fpganinja/taxi.git
synced 2025-12-09 00:48:40 -08:00
lfsr: Fix alignment
Signed-off-by: Alex Forencich <alex@alexforencich.com>
This commit is contained in:
@@ -33,10 +33,10 @@ module taxi_lfsr_prbs_gen #
|
|||||||
parameter DATA_W = 8
|
parameter DATA_W = 8
|
||||||
)
|
)
|
||||||
(
|
(
|
||||||
input wire logic clk,
|
input wire logic clk,
|
||||||
input wire logic rst,
|
input wire logic rst,
|
||||||
|
|
||||||
input wire logic enable,
|
input wire logic enable,
|
||||||
output wire logic [DATA_W-1:0] data_out
|
output wire logic [DATA_W-1:0] data_out
|
||||||
);
|
);
|
||||||
|
|
||||||
|
|||||||
@@ -31,11 +31,11 @@ module taxi_lfsr_scramble #
|
|||||||
parameter DATA_W = 64
|
parameter DATA_W = 64
|
||||||
)
|
)
|
||||||
(
|
(
|
||||||
input wire logic clk,
|
input wire logic clk,
|
||||||
input wire logic rst,
|
input wire logic rst,
|
||||||
|
|
||||||
input wire logic [DATA_W-1:0] data_in,
|
input wire logic [DATA_W-1:0] data_in,
|
||||||
input wire logic data_in_valid,
|
input wire logic data_in_valid,
|
||||||
output wire logic [DATA_W-1:0] data_out
|
output wire logic [DATA_W-1:0] data_out
|
||||||
);
|
);
|
||||||
|
|
||||||
|
|||||||
Reference in New Issue
Block a user