From 99933f3234fff52b7b6d97ccfb05abdcd99968e9 Mon Sep 17 00:00:00 2001 From: Alex Forencich Date: Mon, 14 Apr 2025 22:20:39 -0700 Subject: [PATCH] stats: Optimize zeroing and output logic Signed-off-by: Alex Forencich --- rtl/stats/taxi_stats_collect.sv | 29 +++++++++++++---------------- 1 file changed, 13 insertions(+), 16 deletions(-) diff --git a/rtl/stats/taxi_stats_collect.sv b/rtl/stats/taxi_stats_collect.sv index 59365f9..e5b62a0 100644 --- a/rtl/stats/taxi_stats_collect.sv +++ b/rtl/stats/taxi_stats_collect.sv @@ -136,7 +136,12 @@ always_comb begin mem_rd_en = 1'b0; mem_wr_en = 1'b0; - mem_wr_data = '0; + mem_wr_data = mem_rd_data_reg + STAT_INC_W'(ch_reg); + + if (!m_axis_stat_tvalid_reg) begin + m_axis_stat_tdata_next = mem_rd_data_reg + STAT_INC_W'(ch_reg); + m_axis_stat_tid_next = STAT_ID_W'(count_reg+ID_BASE); + end case (state_reg) STATE_READ: begin @@ -148,24 +153,16 @@ always_comb begin STATE_WRITE: begin mem_wr_en = 1'b1; update_shift_next = {update_reg || update_shift_reg[0], update_shift_reg[CNT-1:1]}; - if (!m_axis_stat_tvalid_reg && (update_reg || update_shift_reg[0])) begin + if (zero_reg) begin + mem_wr_data = STAT_INC_W'(ch_reg); + end else if (!m_axis_stat_tvalid_reg && (update_reg || update_shift_reg[0])) begin update_shift_next[CNT-1] = 1'b0; mem_wr_data = '0; - if (zero_reg) begin - m_axis_stat_tdata_next = STAT_INC_W'(ch_reg); - m_axis_stat_tid_next = STAT_ID_W'(count_reg+ID_BASE); - m_axis_stat_tvalid_next = ch_reg != 0; - end else begin - m_axis_stat_tdata_next = mem_rd_data_reg + STAT_INC_W'(ch_reg); - m_axis_stat_tid_next = STAT_ID_W'(count_reg+ID_BASE); - m_axis_stat_tvalid_next = mem_rd_data_reg != 0 || ch_reg != 0; - end + m_axis_stat_tdata_next = mem_rd_data_reg + STAT_INC_W'(ch_reg); + m_axis_stat_tid_next = STAT_ID_W'(count_reg+ID_BASE); + m_axis_stat_tvalid_next = mem_rd_data_reg != 0 || ch_reg != 0; end else begin - if (zero_reg) begin - mem_wr_data = STAT_INC_W'(ch_reg); - end else begin - mem_wr_data = mem_rd_data_reg + STAT_INC_W'(ch_reg); - end + mem_wr_data = mem_rd_data_reg + STAT_INC_W'(ch_reg); end if (count_reg == CNT_W'(CNT-1)) begin