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cndm: Widen internal datapath to prevent CDC-related bottlenecks

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Signed-off-by: Alex Forencich <alex@alexforencich.com>
This commit is contained in:
Alex Forencich
2026-03-06 15:04:12 -08:00
parent 595d744aa4
commit a46b012c91
2 changed files with 6 additions and 6 deletions
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2
src/cndm/rtl/cndm_micro_core.f
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@@ -15,7 +15,7 @@ cndm_micro_cpl_wr.sv
../lib/taxi/src/apb/rtl/taxi_apb_if.sv
../lib/taxi/src/apb/rtl/taxi_apb_interconnect.sv
../lib/taxi/src/axi/rtl/taxi_axil_interconnect_1s.f
../lib/taxi/src/axis/rtl/taxi_axis_async_fifo.f
../lib/taxi/src/axis/rtl/taxi_axis_async_fifo_adapter.f
../lib/taxi/src/axis/rtl/taxi_axis_arb_mux.f
../lib/taxi/src/axis/rtl/taxi_axis_demux.sv
../lib/taxi/src/ptp/rtl/taxi_ptp_td_phc_apb.f

10
src/cndm/rtl/cndm_micro_port.sv
View File

@@ -426,12 +426,12 @@ cpl_wr_inst (
// TX path
taxi_axis_if #(
.DATA_W(mac_axis_tx.DATA_W),
.DATA_W(mac_axis_tx.DATA_W*2),
.USER_EN(1),
.USER_W(1)
) mac_tx_int();
taxi_axis_async_fifo #(
taxi_axis_async_fifo_adapter #(
.DEPTH(16384),
.RAM_PIPELINE(2),
.FRAME_FIFO(1),
@@ -567,13 +567,13 @@ tx_inst (
// RX path
taxi_axis_if #(
.DATA_W(mac_axis_rx.DATA_W),
.DATA_W(mac_axis_rx.DATA_W*2),
.USER_EN(1),
.USER_W(mac_axis_rx.USER_W)
) mac_rx_int();
taxi_axis_async_fifo #(
.DEPTH(16384),
taxi_axis_async_fifo_adapter #(
.DEPTH(32768),
.RAM_PIPELINE(2),
.FRAME_FIFO(1),
.USER_BAD_FRAME_VALUE(1'b1),