From a56939313af791ad3983313a5932607b42f80c4d Mon Sep 17 00:00:00 2001 From: Alex Forencich Date: Sun, 30 Mar 2025 16:46:47 -0700 Subject: [PATCH] example/ZCU102: Fix IOSTANDARD settings for UART pins Signed-off-by: Alex Forencich --- example/ZCU102/fpga/fpga.xdc | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/example/ZCU102/fpga/fpga.xdc b/example/ZCU102/fpga/fpga.xdc index eb896e1..a5e0141 100644 --- a/example/ZCU102/fpga/fpga.xdc +++ b/example/ZCU102/fpga/fpga.xdc @@ -102,10 +102,10 @@ set_input_delay 0 [get_ports {sw[*]}] #set_output_delay 0 [get_ports {proto_gpio[*]}] # UART (U40 CP2108 ch 2) -set_property -dict {LOC F13 IOSTANDARD LVCMOS12 SLEW SLOW DRIVE 8} [get_ports uart_txd] ;# U40.15 RX_2 -set_property -dict {LOC E13 IOSTANDARD LVCMOS12} [get_ports uart_rxd] ;# U40.16 TX_2 -set_property -dict {LOC D12 IOSTANDARD LVCMOS12} [get_ports uart_rts] ;# U40.14 RTS_2 -set_property -dict {LOC E12 IOSTANDARD LVCMOS12 SLEW SLOW DRIVE 8} [get_ports uart_cts] ;# U40.13 CTS_2 +set_property -dict {LOC F13 IOSTANDARD LVCMOS33 SLEW SLOW DRIVE 8} [get_ports uart_txd] ;# U40.15 RX_2 +set_property -dict {LOC E13 IOSTANDARD LVCMOS33} [get_ports uart_rxd] ;# U40.16 TX_2 +set_property -dict {LOC D12 IOSTANDARD LVCMOS33} [get_ports uart_rts] ;# U40.14 RTS_2 +set_property -dict {LOC E12 IOSTANDARD LVCMOS33 SLEW SLOW DRIVE 8} [get_ports uart_cts] ;# U40.13 CTS_2 set_false_path -to [get_ports {uart_txd uart_cts}] set_output_delay 0 [get_ports {uart_txd uart_cts}]