examples: Add notes on required licenses

Signed-off-by: Alex Forencich <alex@alexforencich.com>
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Alex Forencich
2025-02-19 12:02:07 -08:00
parent d5ed74431a
commit a56a33abc9
5 changed files with 35 additions and 0 deletions

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@@ -18,6 +18,13 @@ The design places looped-back MACs on the BASE-T port and SFP+ cages, as well as
* FPGA: xcku040-ffva1156-2-e
* 1000BASE-T PHY: Marvell 88E1111 via SGMII
## Licensing
* Toolchain
* Vivado Enterprise (requires license)
* IP
* No licensed vendor IP or 3rd party IP
## How to build
Run `make` in the appropriate `fpga*` subdirectory to build the bitstream. Ensure that the Xilinx Vivado toolchain components are in PATH.