From a9a08a678810420cd6585d1934e5311d05277573 Mon Sep 17 00:00:00 2001 From: Alex Forencich Date: Thu, 2 Jul 2026 01:34:06 -0700 Subject: [PATCH] eth: Update example designs Signed-off-by: Alex Forencich --- src/eth/example/KCU105/fpga/rtl/fpga_core.sv | 3 +++ src/eth/example/ZCU102/fpga/rtl/fpga_core.sv | 3 +++ src/eth/example/ZCU106/fpga/rtl/fpga_core.sv | 3 +++ 3 files changed, 9 insertions(+) diff --git a/src/eth/example/KCU105/fpga/rtl/fpga_core.sv b/src/eth/example/KCU105/fpga/rtl/fpga_core.sv index c9148ff..a1d2da4 100644 --- a/src/eth/example/KCU105/fpga/rtl/fpga_core.sv +++ b/src/eth/example/KCU105/fpga/rtl/fpga_core.sv @@ -495,8 +495,11 @@ if (SFP_RATE == 0) begin : sfp_mac .an_en('{2{1'b1}}), .an_restart('{2{1'b0}}), .an_speedup('{2{1'b0}}), + .an_timeout_en('{2{1'b1}}), .an_intr(), + .an_running(), .an_complete(), + .an_timeout(), .an_adv_ability('{2{16'h0020}}), .an_lp_adv_ability(), diff --git a/src/eth/example/ZCU102/fpga/rtl/fpga_core.sv b/src/eth/example/ZCU102/fpga/rtl/fpga_core.sv index 2fe12ea..4f431a6 100644 --- a/src/eth/example/ZCU102/fpga/rtl/fpga_core.sv +++ b/src/eth/example/ZCU102/fpga/rtl/fpga_core.sv @@ -361,8 +361,11 @@ if (SFP_RATE == 0) begin : sfp_mac .an_en('{4{1'b1}}), .an_restart('{4{1'b0}}), .an_speedup('{4{1'b0}}), + .an_timeout_en('{4{1'b1}}), .an_intr(), + .an_running(), .an_complete(), + .an_timeout(), .an_adv_ability('{4{16'h0020}}), .an_lp_adv_ability(), diff --git a/src/eth/example/ZCU106/fpga/rtl/fpga_core.sv b/src/eth/example/ZCU106/fpga/rtl/fpga_core.sv index 5b22253..01da20d 100644 --- a/src/eth/example/ZCU106/fpga/rtl/fpga_core.sv +++ b/src/eth/example/ZCU106/fpga/rtl/fpga_core.sv @@ -362,8 +362,11 @@ if (SFP_RATE == 0) begin : sfp_mac .an_en('{2{1'b1}}), .an_restart('{2{1'b0}}), .an_speedup('{2{1'b0}}), + .an_timeout_en('{2{1'b1}}), .an_intr(), + .an_running(), .an_complete(), + .an_timeout(), .an_adv_ability('{2{16'h0020}}), .an_lp_adv_ability(),