From add1c7aec2e90d124fb5eef3ea83c5e31227789b Mon Sep 17 00:00:00 2001 From: Alex Forencich Date: Fri, 20 Feb 2026 21:10:04 -0800 Subject: [PATCH] eth: Fix path Signed-off-by: Alex Forencich --- src/eth/example/VCU108/fpga/tb/fpga_core/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/eth/example/VCU108/fpga/tb/fpga_core/Makefile b/src/eth/example/VCU108/fpga/tb/fpga_core/Makefile index bf067a8..4e432fe 100644 --- a/src/eth/example/VCU108/fpga/tb/fpga_core/Makefile +++ b/src/eth/example/VCU108/fpga/tb/fpga_core/Makefile @@ -26,8 +26,8 @@ VERILOG_SOURCES += $(RTL_DIR)/$(DUT).sv VERILOG_SOURCES += $(TAXI_SRC_DIR)/eth/rtl/taxi_eth_mac_1g_fifo.f VERILOG_SOURCES += $(TAXI_SRC_DIR)/eth/rtl/us/taxi_eth_mac_25g_us.f VERILOG_SOURCES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_if_uart.f -VERILOG_SOURCES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_apb.sv VERILOG_SOURCES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_switch.sv +VERILOG_SOURCES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_apb.f VERILOG_SOURCES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_stats.f VERILOG_SOURCES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_reset.sv VERILOG_SOURCES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_signal.sv