From bc4a6d3f2aa30156267ad279682e66d99558a633 Mon Sep 17 00:00:00 2001 From: Alex Forencich Date: Tue, 14 Jul 2026 00:16:26 -0700 Subject: [PATCH] eth: Update example designs Signed-off-by: Alex Forencich --- src/eth/example/XUPP3R/fpga/rtl/fpga_core.sv | 4 ++-- src/eth/example/ZCU102/fpga/rtl/fpga_core.sv | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/src/eth/example/XUPP3R/fpga/rtl/fpga_core.sv b/src/eth/example/XUPP3R/fpga/rtl/fpga_core.sv index 38df216..30f8b38 100644 --- a/src/eth/example/XUPP3R/fpga/rtl/fpga_core.sv +++ b/src/eth/example/XUPP3R/fpga/rtl/fpga_core.sv @@ -321,8 +321,8 @@ for (genvar n = 0; n < GTY_QUAD_CNT; n = n + 1) begin : gt_quad // MAC/PHY config .COMBINED_MAC_PCS(COMBINED_MAC_PCS), - .DATA_W(MAC_DATA_W), - .USXGMII_EN(1'b0), + .DATA_W(eth_gty_axis_tx[0].DATA_W), + .USXGMII_EN(COMBINED_MAC_PCS && eth_gty_axis_tx[0].DATA_W == 32), .DIC_EN(1'b1), .PTP_TS_EN(1'b0), .PTP_TD_EN(1'b0), diff --git a/src/eth/example/ZCU102/fpga/rtl/fpga_core.sv b/src/eth/example/ZCU102/fpga/rtl/fpga_core.sv index cdd166a..51ab363 100644 --- a/src/eth/example/ZCU102/fpga/rtl/fpga_core.sv +++ b/src/eth/example/ZCU102/fpga/rtl/fpga_core.sv @@ -547,7 +547,7 @@ end else begin : sfp_mac // PHY parameters .COMBINED_MAC_PCS(COMBINED_MAC_PCS), .DATA_W(axis_sfp_tx[0].DATA_W), - .USXGMII_EN(1'b1), + .USXGMII_EN(COMBINED_MAC_PCS && axis_sfp_tx[0].DATA_W == 32), .DIC_EN(1'b1), .PTP_TS_EN(1'b0), .PTP_TD_EN(1'b0),