From bedd85d7f6acf3e00b1e8a9db311098c0934432f Mon Sep 17 00:00:00 2001 From: Alex Forencich Date: Sat, 10 Jan 2026 00:35:42 -0800 Subject: [PATCH] Update readme Signed-off-by: Alex Forencich --- README.md | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/README.md b/README.md index 1c1478b..b3a4d8a 100644 --- a/README.md +++ b/README.md @@ -74,6 +74,9 @@ To facilitate the dual-license model, contributions to the project can only be a * DMA client for AXI stream * DMA interface for AXI * DMA interface for UltraScale PCIe + * DMA descriptor mux + * DMA RAM demux + * DMA interface mux * Segmented SDP RAM * Segmented dual-clock SDP RAM * Ethernet @@ -126,6 +129,7 @@ To facilitate the dual-license model, contributions to the project can only be a * PCI Express * PCIe AXI lite master * PCIe AXI lite master for Xilinx UltraScale + * MSI shim for Xilinx UltraScale * Primitives * Arbiter * Priority encoder