diff --git a/src/cndm/modules/cndm/cndm_main.c b/src/cndm/modules/cndm/cndm_main.c
index dc7211a..fc59be7 100644
--- a/src/cndm/modules/cndm/cndm_main.c
+++ b/src/cndm/modules/cndm/cndm_main.c
@@ -118,15 +118,72 @@ static int cndm_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
 	struct device *dev = &pdev->dev;
 	struct devlink *devlink;
 	struct cndm_dev *cdev;
+	struct pci_dev *bridge = pci_upstream_bridge(pdev);
 	int ret = 0;
 
 	dev_info(dev, DRIVER_NAME " PCI probe");
 	dev_info(dev, "Corundum device driver");
 	dev_info(dev, "Version " DRIVER_VERSION);
-	dev_info(dev, "Copyright (c) 2025 FPGA Ninja");
+	dev_info(dev, "Copyright (c) 2025 FPGA Ninja, LLC");
 	dev_info(dev, "https://fpga.ninja/");
+	dev_info(dev, "PCIe configuration summary:");
 
+	if (pdev->pcie_cap) {
+		u16 devctl;
+		u32 lnkcap;
+		u16 lnkctl;
+		u16 lnksta;
+
+		pci_read_config_word(pdev, pdev->pcie_cap + PCI_EXP_DEVCTL, &devctl);
+		pci_read_config_dword(pdev, pdev->pcie_cap + PCI_EXP_LNKCAP, &lnkcap);
+		pci_read_config_word(pdev, pdev->pcie_cap + PCI_EXP_LNKCTL, &lnkctl);
+		pci_read_config_word(pdev, pdev->pcie_cap + PCI_EXP_LNKSTA, &lnksta);
+
+		dev_info(dev, "  Max payload size: %d bytes",
+				128 << ((devctl & PCI_EXP_DEVCTL_PAYLOAD) >> 5));
+		dev_info(dev, "  Max read request size: %d bytes",
+				128 << ((devctl & PCI_EXP_DEVCTL_READRQ) >> 12));
+		dev_info(dev, "  Read completion boundary: %d bytes",
+				lnkctl & PCI_EXP_LNKCTL_RCB ? 128 : 64);
+		dev_info(dev, "  Link capability: gen %d x%d",
+				lnkcap & PCI_EXP_LNKCAP_SLS, (lnkcap & PCI_EXP_LNKCAP_MLW) >> 4);
+		dev_info(dev, "  Link status: gen %d x%d",
+				lnksta & PCI_EXP_LNKSTA_CLS, (lnksta & PCI_EXP_LNKSTA_NLW) >> 4);
+		dev_info(dev, "  Relaxed ordering: %s",
+				devctl & PCI_EXP_DEVCTL_RELAX_EN ? "enabled" : "disabled");
+		dev_info(dev, "  Phantom functions: %s",
+				devctl & PCI_EXP_DEVCTL_PHANTOM ? "enabled" : "disabled");
+		dev_info(dev, "  Extended tags: %s",
+				devctl & PCI_EXP_DEVCTL_EXT_TAG ? "enabled" : "disabled");
+		dev_info(dev, "  No snoop: %s",
+				devctl & PCI_EXP_DEVCTL_NOSNOOP_EN ? "enabled" : "disabled");
+	}
+
+#ifdef CONFIG_NUMA
+	dev_info(dev, "  NUMA node: %d", pdev->dev.numa_node);
+#endif
+
+	if (bridge) {
+		dev_info(dev, "  Bridge PCI ID: %04x:%02x:%02x.%d", pci_domain_nr(bridge->bus),
+				bridge->bus->number, PCI_SLOT(bridge->devfn), PCI_FUNC(bridge->devfn));
+	}
+
+	if (bridge && bridge->pcie_cap) {
+		u32 lnkcap;
+		u16 lnksta;
+
+		pci_read_config_dword(bridge, bridge->pcie_cap + PCI_EXP_LNKCAP, &lnkcap);
+		pci_read_config_word(bridge, bridge->pcie_cap + PCI_EXP_LNKSTA, &lnksta);
+
+		dev_info(dev, "  Bridge link capability: gen %d x%d",
+				lnkcap & PCI_EXP_LNKCAP_SLS, (lnkcap & PCI_EXP_LNKCAP_MLW) >> 4);
+		dev_info(dev, "  Bridge link status: gen %d x%d",
+				lnksta & PCI_EXP_LNKSTA_CLS, (lnksta & PCI_EXP_LNKSTA_NLW) >> 4);
+	}
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 17, 0)
 	pcie_print_link_status(pdev);
+#endif
 
 	devlink = cndm_devlink_alloc(dev);
 	if (!devlink)