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pyrite: Cast widths

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Signed-off-by: Alex Forencich <alex@alexforencich.com>
This commit is contained in:
Alex Forencich
2026-02-20 22:14:20 -08:00
parent 9b55a08465
commit c37b4cbbfa
2 changed files with 8 additions and 8 deletions
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8
src/pyrite/rtl/pyrite_pcie_us_vpd_bpi.sv
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@@ -241,10 +241,10 @@ always_ff @(posedge clk) begin
8'h48: vpd_apb_prdata_reg <= 0; // BPI flash ctrl: Next header 8'h48: vpd_apb_prdata_reg <= 0; // BPI flash ctrl: Next header
8'h4C: begin 8'h4C: begin
// BPI flash ctrl: format // BPI flash ctrl: format
vpd_apb_prdata_reg[3:0] <= FLASH_SEG_COUNT; // configuration (two segments) vpd_apb_prdata_reg[3:0] <= FLASH_SEG_COUNT; // configuration
vpd_apb_prdata_reg[7:4] <= FLASH_SEG_DEFAULT; // default segment vpd_apb_prdata_reg[7:4] <= FLASH_SEG_DEFAULT; // default segment
vpd_apb_prdata_reg[11:8] <= FLASH_SEG_FALLBACK; // fallback segment vpd_apb_prdata_reg[11:8] <= FLASH_SEG_FALLBACK; // fallback segment
vpd_apb_prdata_reg[31:12] <= FLASH_SEG0_SIZE >> 12; // first segment size (even split) vpd_apb_prdata_reg[31:12] <= 20'(FLASH_SEG0_SIZE >> 12); // first segment size
end end
8'h50: begin 8'h50: begin
// BPI flash ctrl: control // BPI flash ctrl: control

8
src/pyrite/rtl/pyrite_pcie_us_vpd_qspi.sv
View File

@@ -243,10 +243,10 @@ always_ff @(posedge clk) begin
8'h48: vpd_apb_prdata_reg <= 0; // SPI flash ctrl: Next header 8'h48: vpd_apb_prdata_reg <= 0; // SPI flash ctrl: Next header
8'h4C: begin 8'h4C: begin
// SPI flash ctrl: format // SPI flash ctrl: format
vpd_apb_prdata_reg[3:0] <= FLASH_SEG_COUNT; // configuration (two segments) vpd_apb_prdata_reg[3:0] <= FLASH_SEG_COUNT; // configuration
vpd_apb_prdata_reg[7:4] <= FLASH_SEG_DEFAULT; // default segment vpd_apb_prdata_reg[7:4] <= FLASH_SEG_DEFAULT; // default segment
vpd_apb_prdata_reg[11:8] <= FLASH_SEG_FALLBACK; // fallback segment vpd_apb_prdata_reg[11:8] <= FLASH_SEG_FALLBACK; // fallback segment
vpd_apb_prdata_reg[31:12] <= FLASH_SEG0_SIZE >> 12; // first segment size (even split) vpd_apb_prdata_reg[31:12] <= 20'(FLASH_SEG0_SIZE >> 12); // first segment size
end end
8'h50: begin 8'h50: begin
// SPI flash ctrl: control 0 // SPI flash ctrl: control 0