bslathi19/taxi
1
0
Fork 0
mirror of https://github.com/fpganinja/taxi.git synced 2025-12-10 01:08:40 -08:00
Code Issues Packages Projects Releases Wiki Activity

example: Clean up and annotate USB UART connections

Browse Source 
Signed-off-by: Alex Forencich <alex@alexforencich.com>
This commit is contained in:
Alex Forencich
2025-03-20 17:32:31 -07:00
parent 315a4715ff
commit c7cf9cc1bf
33 changed files with 177 additions and 157 deletions
Download Patch File Download Diff File Expand all files Collapse all files

1
example/KC705/fpga/README.md
View File

@@ -18,6 +18,7 @@ The design places looped-back MACs on both the BASE-T port as well as the SFP+ c
## Board details
* FPGA: XC7K325T-2FFG900C
* USB UART: Silicon Labs CP2103
* 1000BASE-T PHY: Marvell 88E1111 via GMII, RGMII, or SGMII
* 1000BASE-X PHY: Xilinx PCS/PMA core via GTX transceiver