example: Clean up and annotate USB UART connections

Signed-off-by: Alex Forencich <alex@alexforencich.com>
This commit is contained in:
Alex Forencich
2025-03-20 17:32:31 -07:00
parent 315a4715ff
commit c7cf9cc1bf
33 changed files with 177 additions and 157 deletions

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@@ -16,6 +16,7 @@ The design places looped-back MACs on the BASE-T and QSFP28 ports as well as a l
## Board details
* FPGA: xcvu9p-flga2104-2L-e
* USB UART: Silicon Labs CP2105 SCI
* 1000BASE-T PHY: TI DP83867ISRGZ via SGMII
* 25GBASE-R PHY: Soft PCS with GTY transceivers