diff --git a/tb/eth/taxi_eth_mac_10g_fifo/test_taxi_eth_mac_10g_fifo.py b/tb/eth/taxi_eth_mac_10g_fifo/test_taxi_eth_mac_10g_fifo.py index e307edf..9f65b45 100644 --- a/tb/eth/taxi_eth_mac_10g_fifo/test_taxi_eth_mac_10g_fifo.py +++ b/tb/eth/taxi_eth_mac_10g_fifo/test_taxi_eth_mac_10g_fifo.py @@ -47,7 +47,7 @@ class TB: self.xgmii_sink = XgmiiSink(dut.xgmii_txd, dut.xgmii_txc, dut.tx_clk, dut.tx_rst) self.axis_source = AxiStreamSource(AxiStreamBus.from_entity(dut.s_axis_tx), dut.logic_clk, dut.logic_rst) - self.tx_cpl_sink = AxiStreamSink(AxiStreamBus.from_entity(dut.m_axis_tx_cpl), dut.tx_clk, dut.tx_rst) + self.tx_cpl_sink = AxiStreamSink(AxiStreamBus.from_entity(dut.m_axis_tx_cpl), dut.logic_clk, dut.logic_rst) self.axis_sink = AxiStreamSink(AxiStreamBus.from_entity(dut.m_axis_rx), dut.logic_clk, dut.logic_rst) self.ptp_clock = PtpClockSimTime(ts_tod=dut.ptp_ts, clock=dut.logic_clk) diff --git a/tb/eth/taxi_eth_mac_1g_fifo/test_taxi_eth_mac_1g_fifo.py b/tb/eth/taxi_eth_mac_1g_fifo/test_taxi_eth_mac_1g_fifo.py index 4d68f95..c884af9 100644 --- a/tb/eth/taxi_eth_mac_1g_fifo/test_taxi_eth_mac_1g_fifo.py +++ b/tb/eth/taxi_eth_mac_1g_fifo/test_taxi_eth_mac_1g_fifo.py @@ -46,7 +46,7 @@ class TB: dut.tx_clk, dut.tx_rst, dut.tx_clk_enable, dut.tx_mii_select) self.axis_source = AxiStreamSource(AxiStreamBus.from_entity(dut.s_axis_tx), dut.logic_clk, dut.logic_rst) - self.tx_cpl_sink = AxiStreamSink(AxiStreamBus.from_entity(dut.m_axis_tx_cpl), dut.tx_clk, dut.tx_rst) + self.tx_cpl_sink = AxiStreamSink(AxiStreamBus.from_entity(dut.m_axis_tx_cpl), dut.logic_clk, dut.logic_rst) self.axis_sink = AxiStreamSink(AxiStreamBus.from_entity(dut.m_axis_rx), dut.logic_clk, dut.logic_rst) dut.rx_clk_enable.setimmediatevalue(1) diff --git a/tb/eth/taxi_eth_mac_phy_10g_fifo/test_taxi_eth_mac_phy_10g_fifo.py b/tb/eth/taxi_eth_mac_phy_10g_fifo/test_taxi_eth_mac_phy_10g_fifo.py index bb5de61..496db38 100644 --- a/tb/eth/taxi_eth_mac_phy_10g_fifo/test_taxi_eth_mac_phy_10g_fifo.py +++ b/tb/eth/taxi_eth_mac_phy_10g_fifo/test_taxi_eth_mac_phy_10g_fifo.py @@ -58,7 +58,7 @@ class TB: self.serdes_sink = BaseRSerdesSink(dut.serdes_tx_data, dut.serdes_tx_hdr, dut.tx_clk) self.axis_source = AxiStreamSource(AxiStreamBus.from_entity(dut.s_axis_tx), dut.logic_clk, dut.logic_rst) - self.tx_cpl_sink = AxiStreamSink(AxiStreamBus.from_entity(dut.m_axis_tx_cpl), dut.tx_clk, dut.tx_rst) + self.tx_cpl_sink = AxiStreamSink(AxiStreamBus.from_entity(dut.m_axis_tx_cpl), dut.logic_clk, dut.logic_rst) self.axis_sink = AxiStreamSink(AxiStreamBus.from_entity(dut.m_axis_rx), dut.logic_clk, dut.logic_rst) self.ptp_clock = PtpClockSimTime(ts_tod=dut.ptp_ts, clock=dut.logic_clk)