From d4acf48e0a34f4dc3efd7c39ef066e0efbeaf2a4 Mon Sep 17 00:00:00 2001 From: Alex Forencich Date: Fri, 13 Jun 2025 16:34:44 -0700 Subject: [PATCH] eth: Fix gearbox interface in 10G PHY Signed-off-by: Alex Forencich --- src/eth/rtl/taxi_xgmii_baser_dec_64.sv | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/src/eth/rtl/taxi_xgmii_baser_dec_64.sv b/src/eth/rtl/taxi_xgmii_baser_dec_64.sv index 9d7bd04..9ea173c 100644 --- a/src/eth/rtl/taxi_xgmii_baser_dec_64.sv +++ b/src/eth/rtl/taxi_xgmii_baser_dec_64.sv @@ -122,7 +122,7 @@ logic frame_reg = 1'b0, frame_next; assign xgmii_rxd = xgmii_rxd_reg; assign xgmii_rxc = xgmii_rxc_reg; -assign xgmii_rx_valid = xgmii_rx_valid_reg; +assign xgmii_rx_valid = GBX_IF_EN ? xgmii_rx_valid_reg : 1'b1; assign rx_bad_block = rx_bad_block_reg; assign rx_sequence_error = rx_sequence_error_reg; @@ -186,10 +186,12 @@ always_comb begin // data block xgmii_rxd_next = encoded_rx_data; xgmii_rxc_next = 8'h00; + xgmii_rx_valid_next = 1'b1; rx_bad_block_next = 1'b0; end else begin // control block // use only four bits of block type for reduced fanin + xgmii_rx_valid_next = 1'b1; case (encoded_rx_data[7:4]) BLOCK_TYPE_CTRL[7:4]: begin // C7 C6 C5 C4 C3 C2 C1 C0 BT