From d667623b67ed0f35900b7c252c74578e124f43ad Mon Sep 17 00:00:00 2001 From: Alex Forencich Date: Wed, 8 Jul 2026 01:22:00 -0700 Subject: [PATCH] eth: Add support for USXGMII symbol replication to BASE-R sink model Signed-off-by: Alex Forencich --- src/eth/tb/baser.py | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/src/eth/tb/baser.py b/src/eth/tb/baser.py index 0f81377..5f7325e 100644 --- a/src/eth/tb/baser.py +++ b/src/eth/tb/baser.py @@ -561,6 +561,8 @@ class BaseRSerdesSink: self.queue_occupancy_bytes = 0 self.queue_occupancy_frames = 0 + self.xgmii_rep_count = 0 + self.os = None self.os_sig = False @@ -631,6 +633,12 @@ class BaseRSerdesSink: continue self.gbx_bit_cnt += in_bits + def set_xgmii_rep_count(self, rep=0): + self.xgmii_rep_count = int(rep) + + def get_xgmii_rep_count(self): + return self.xgmii_rep_count + def get_os(self): ret = (self.os, self.os_sig) self.os = None @@ -693,6 +701,8 @@ class BaseRSerdesSink: data = 0 hdr = 0 + skip_cnt = 0 + while True: await clock_edge_event @@ -935,6 +945,20 @@ class BaseRSerdesSink: d_val = dl[k] c_val = cl[k] + # USXGMII sync + if self.xgmii_rep_count: + if c_val and d_val == XgmiiCtrl.START: + skip_cnt = 0 + + # USXGMII skip + if skip_cnt > 0: + if k == 3 or k == 7: + skip_cnt -= 1 + continue + elif self.xgmii_rep_count: + if k == 3 or k == 7: + skip_cnt = self.xgmii_rep_count + if frame is None: if c_val and d_val == XgmiiCtrl.START: # start