From da3996cf5ce7cfde4d3686ed883f68a1894ed52d Mon Sep 17 00:00:00 2001 From: Alex Forencich Date: Wed, 26 Feb 2025 14:16:18 -0800 Subject: [PATCH] example/ADM_PCIE_9V3: Example design cleanup Signed-off-by: Alex Forencich --- example/ADM_PCIE_9V3/fpga/rtl/fpga_core.sv | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/example/ADM_PCIE_9V3/fpga/rtl/fpga_core.sv b/example/ADM_PCIE_9V3/fpga/rtl/fpga_core.sv index 115a510..ad11ea8 100644 --- a/example/ADM_PCIE_9V3/fpga/rtl/fpga_core.sv +++ b/example/ADM_PCIE_9V3/fpga/rtl/fpga_core.sv @@ -26,16 +26,16 @@ module fpga_core # * Clock: 125 MHz * Synchronous reset */ - input wire clk_125mhz, - input wire rst_125mhz, + input wire logic clk_125mhz, + input wire logic rst_125mhz, /* * GPIO */ - output wire [1:0] user_led_g, - output wire user_led_r, - output wire [1:0] front_led, - input wire [1:0] user_sw, + output wire logic [1:0] user_led_g, + output wire logic user_led_r, + output wire logic [1:0] front_led, + input wire logic [1:0] user_sw, /* * Ethernet: QSFP28