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https://github.com/fpganinja/taxi.git
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eth: Add MAC statistics module to 1G MACs
Signed-off-by: Alex Forencich <alex@alexforencich.com>
This commit is contained in:
@@ -23,6 +23,11 @@ module taxi_eth_mac_1g_rgmii_fifo #
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parameter logic USE_CLK90 = 1'b1,
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parameter logic PADDING_EN = 1'b1,
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parameter MIN_FRAME_LEN = 64,
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parameter logic STAT_EN = 1'b0,
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parameter STAT_TX_LEVEL = 1,
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parameter STAT_RX_LEVEL = STAT_TX_LEVEL,
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parameter STAT_ID_BASE = 0,
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parameter STAT_UPDATE_PERIOD = 1024,
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parameter TX_FIFO_DEPTH = 4096,
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parameter TX_FIFO_RAM_PIPELINE = 1,
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parameter logic TX_FRAME_FIFO = 1'b1,
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@@ -65,6 +70,13 @@ module taxi_eth_mac_1g_rgmii_fifo #
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output wire logic [3:0] rgmii_txd,
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output wire logic rgmii_tx_ctl,
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/*
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* Statistics
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*/
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input wire logic stat_clk,
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input wire logic stat_rst,
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taxi_axis_if.src m_axis_stat,
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/*
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* Status
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*/
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@@ -82,8 +94,10 @@ module taxi_eth_mac_1g_rgmii_fifo #
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/*
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* Configuration
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*/
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input wire logic [7:0] cfg_ifg = 8'd12,
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input wire logic [15:0] cfg_tx_max_pkt_len = 16'd1518,
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input wire logic [7:0] cfg_tx_ifg = 8'd12,
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input wire logic cfg_tx_enable = 1'b1,
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input wire logic [15:0] cfg_rx_max_pkt_len = 16'd1518,
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input wire logic cfg_rx_enable = 1'b1
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);
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@@ -176,6 +190,8 @@ always @(posedge logic_clk) begin
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link_speed_sync_reg_2 <= link_speed_sync_reg_1;
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end
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wire stat_rx_fifo_drop;
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taxi_eth_mac_1g_rgmii #(
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.SIM(SIM),
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.VENDOR(VENDOR),
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@@ -185,7 +201,12 @@ taxi_eth_mac_1g_rgmii #(
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.MIN_FRAME_LEN(MIN_FRAME_LEN),
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.PTP_TS_EN(1'b0),
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.PFC_EN(1'b0),
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.PAUSE_EN(1'b0)
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.PAUSE_EN(1'b0),
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.STAT_EN(STAT_EN),
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.STAT_TX_LEVEL(STAT_TX_LEVEL),
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.STAT_RX_LEVEL(STAT_RX_LEVEL),
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.STAT_ID_BASE(STAT_ID_BASE),
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.STAT_UPDATE_PERIOD(STAT_UPDATE_PERIOD)
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)
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eth_mac_1g_rgmii_inst (
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.gtx_clk(gtx_clk),
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@@ -248,14 +269,46 @@ eth_mac_1g_rgmii_inst (
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.tx_pause_req(0),
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.tx_pause_ack(),
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/*
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* Statistics
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*/
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.stat_clk(stat_clk),
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.stat_rst(stat_rst),
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.m_axis_stat(m_axis_stat),
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/*
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* Status
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*/
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// .rx_error_bad_frame(rx_error_bad_frame_int),
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.tx_start_packet(),
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.tx_error_underflow(tx_error_underflow_int),
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.stat_tx_byte(),
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.stat_tx_pkt_len(),
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.stat_tx_pkt_ucast(),
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.stat_tx_pkt_mcast(),
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.stat_tx_pkt_bcast(),
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.stat_tx_pkt_vlan(),
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.stat_tx_pkt_good(),
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.stat_tx_pkt_bad(),
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.stat_tx_err_oversize(),
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.stat_tx_err_user(),
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.stat_tx_err_underflow(tx_error_underflow_int),
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.rx_start_packet(),
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.rx_error_bad_frame(rx_error_bad_frame_int),
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.rx_error_bad_fcs(rx_error_bad_fcs_int),
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.stat_rx_byte(),
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.stat_rx_pkt_len(),
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.stat_rx_pkt_fragment(),
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.stat_rx_pkt_jabber(),
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.stat_rx_pkt_ucast(),
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.stat_rx_pkt_mcast(),
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.stat_rx_pkt_bcast(),
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.stat_rx_pkt_vlan(),
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.stat_rx_pkt_good(),
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.stat_rx_pkt_bad(),
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.stat_rx_err_oversize(),
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.stat_rx_err_bad_fcs(rx_error_bad_fcs_int),
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.stat_rx_err_bad_block(),
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.stat_rx_err_framing(),
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.stat_rx_err_preamble(),
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.stat_rx_fifo_drop(stat_rx_fifo_drop),
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.link_speed(link_speed_int),
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.stat_tx_mcf(),
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.stat_rx_mcf(),
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@@ -279,8 +332,10 @@ eth_mac_1g_rgmii_inst (
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/*
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* Configuration
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*/
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.cfg_ifg(cfg_ifg),
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.cfg_tx_max_pkt_len(cfg_tx_max_pkt_len),
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.cfg_tx_ifg(cfg_tx_ifg),
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.cfg_tx_enable(cfg_tx_enable),
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.cfg_rx_max_pkt_len(cfg_rx_max_pkt_len),
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.cfg_rx_enable(cfg_rx_enable),
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.cfg_mcf_rx_eth_dst_mcast('0),
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.cfg_mcf_rx_check_eth_dst_mcast('0),
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@@ -443,7 +498,7 @@ rx_fifo (
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*/
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.s_status_depth(),
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.s_status_depth_commit(),
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.s_status_overflow(),
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.s_status_overflow(stat_rx_fifo_drop),
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.s_status_bad_frame(),
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.s_status_good_frame(),
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.m_status_depth(),
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