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lss: Implement fractional baud rate generation for UART

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Signed-off-by: Alex Forencich <alex@alexforencich.com>
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Alex Forencich
2025-03-11 23:49:39 -07:00
parent 1c686391ab
commit ebeadee172
19 changed files with 86 additions and 57 deletions
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3
tb/lss/taxi_uart/Makefile
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@@ -28,7 +28,8 @@ uniq_base = $(if $1,$(call uniq_base,$(foreach f,$1,$(if $(filter-out $(notdir $
VERILOG_SOURCES := $(call uniq_base,$(call process_f_files,$(VERILOG_SOURCES)))
# module parameters
export PARAM_DATA_W ?= 8
export PARAM_PRE_W := 16
export PARAM_DATA_W := 8
ifeq ($(SIM), icarus)
PLUSARGS += -fst