From f4f473afeb3e41b4c9006a75cdd51e25dbc58481 Mon Sep 17 00:00:00 2001
From: Alex Forencich <alex@alexforencich.com>
Date: Tue, 30 Sep 2025 15:19:07 -0700
Subject: [PATCH] apb: Add user sideband signals to APB interface

Signed-off-by: Alex Forencich <alex@alexforencich.com>
---
 src/apb/rtl/taxi_apb_if.sv | 54 +++++++++++++++++++++++++++++---------
 1 file changed, 41 insertions(+), 13 deletions(-)

diff --git a/src/apb/rtl/taxi_apb_if.sv b/src/apb/rtl/taxi_apb_if.sv
index 1f81c8f..392e51a 100644
--- a/src/apb/rtl/taxi_apb_if.sv
+++ b/src/apb/rtl/taxi_apb_if.sv
@@ -14,19 +14,39 @@ interface taxi_apb_if #(
     // Width of address bus in bits
     parameter ADDR_W = 32,
     // Width of pstrb (width of data bus in words)
-    parameter STRB_W = (DATA_W/8)
+    parameter STRB_W = (DATA_W/8),
+    // Use pauser signal
+    parameter logic PAUSER_EN = 1'b0,
+    // Width of pauser signal
+    parameter PAUSER_W = 1,
+    // Use pwuser signal
+    parameter logic PWUSER_EN = 1'b0,
+    // Width of pwuser signal
+    parameter PWUSER_W = 1,
+    // Use pruser signal
+    parameter logic PRUSER_EN = 1'b0,
+    // Width of pruser signal
+    parameter PRUSER_W = 1,
+    // Use pbuser signal
+    parameter logic PBUSER_EN = 1'b0,
+    // Width of pbuser signal
+    parameter PBUSER_W = 1
 )
 ();
-    logic [ADDR_W-1:0]  paddr;
-    logic [2:0]         pprot;
-    logic               psel;
-    logic               penable;
-    logic               pwrite;
-    logic [DATA_W-1:0]  pwdata;
-    logic [STRB_W-1:0]  pstrb;
-    logic               pready;
-    logic [DATA_W-1:0]  prdata;
-    logic               pslverr;
+    logic [ADDR_W-1:0]    paddr;
+    logic [2:0]           pprot;
+    logic                 psel;
+    logic                 penable;
+    logic                 pwrite;
+    logic [DATA_W-1:0]    pwdata;
+    logic [STRB_W-1:0]    pstrb;
+    logic                 pready;
+    logic [DATA_W-1:0]    prdata;
+    logic                 pslverr;
+    logic [PAUSER_W-1:0]  pauser;
+    logic [PWUSER_W-1:0]  pwuser;
+    logic [PRUSER_W-1:0]  pruser;
+    logic [PBUSER_W-1:0]  pbuser;
 
     modport mst (
         output paddr,
@@ -38,7 +58,11 @@ interface taxi_apb_if #(
         output pstrb,
         input  pready,
         input  prdata,
-        input  pslverr
+        input  pslverr,
+        output pauser,
+        output pwuser,
+        input  pruser,
+        input  pbuser
     );
 
     modport slv (
@@ -51,7 +75,11 @@ interface taxi_apb_if #(
         input  pstrb,
         output pready,
         output prdata,
-        output pslverr
+        output pslverr,
+        input  pauser,
+        input  pwuser,
+        output pruser,
+        output pbuser
     );
 
 endinterface