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eth: Remove extraneous QPLL ports on CMAC wrapper

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Signed-off-by: Alex Forencich <alex@alexforencich.com>
This commit is contained in:
Alex Forencich
2026-08-14 12:43:25 -07:00
parent 7fdde621dc
commit f9c84f70f9
14 changed files with 19 additions and 112 deletions
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8
src/eth/example/ADM_PCIE_9V3/fpga/rtl/fpga_core.sv
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@@ -197,15 +197,7 @@ for (genvar n = 0; n < 2; n = n + 1) begin : gt_quad
*/
.xcvr_gtpowergood_out(qsfp_gtpowergood[n]),
.xcvr_gtrefclk00_in(qsfp_0_mgt_refclk),
.xcvr_qpll0pd_in(1'b0),
.xcvr_qpll0lock_out(),
.xcvr_qpll0clk_out(),
.xcvr_qpll0refclk_out(),
.xcvr_gtrefclk01_in(qsfp_0_mgt_refclk),
.xcvr_qpll1pd_in(1'b0),
.xcvr_qpll1lock_out(),
.xcvr_qpll1clk_out(),
.xcvr_qpll1refclk_out(),
/*
* Serial data

8
src/eth/example/Alveo/fpga/rtl/fpga_core.sv
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@@ -377,15 +377,7 @@ for (genvar n = 0; n < GTY_QUAD_CNT; n = n + 1) begin : gt_quad
*/
.xcvr_gtpowergood_out(eth_gty_gtpowergood[n]),
.xcvr_gtrefclk00_in(eth_gty_mgt_refclk[CLK]),
.xcvr_qpll0pd_in(1'b0),
.xcvr_qpll0lock_out(),
.xcvr_qpll0clk_out(),
.xcvr_qpll0refclk_out(),
.xcvr_gtrefclk01_in(eth_gty_mgt_refclk[CLK]),
.xcvr_qpll1pd_in(1'b0),
.xcvr_qpll1lock_out(),
.xcvr_qpll1clk_out(),
.xcvr_qpll1refclk_out(),
/*
* Serial data

8
src/eth/example/HTG9200/fpga/rtl/fpga_core.sv
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@@ -465,15 +465,7 @@ for (genvar n = 0; n < GTY_QUAD_CNT; n = n + 1) begin : gt_quad
*/
.xcvr_gtpowergood_out(eth_gty_gtpowergood[n]),
.xcvr_gtrefclk00_in(eth_gty_mgt_refclk[CLK]),
.xcvr_qpll0pd_in(1'b0),
.xcvr_qpll0lock_out(),
.xcvr_qpll0clk_out(),
.xcvr_qpll0refclk_out(),
.xcvr_gtrefclk01_in(eth_gty_mgt_refclk[CLK]),
.xcvr_qpll1pd_in(1'b0),
.xcvr_qpll1lock_out(),
.xcvr_qpll1clk_out(),
.xcvr_qpll1refclk_out(),
/*
* Serial data

8
src/eth/example/HTG_ZRF8/fpga/rtl/fpga_core.sv
View File

@@ -402,15 +402,7 @@ for (genvar n = 0; n < GTY_QUAD_CNT; n = n + 1) begin : gty_quad
*/
.xcvr_gtpowergood_out(eth_gty_gtpowergood[n]),
.xcvr_gtrefclk00_in(eth_gty_mgt_refclk[CLK]),
.xcvr_qpll0pd_in(1'b0),
.xcvr_qpll0lock_out(),
.xcvr_qpll0clk_out(),
.xcvr_qpll0refclk_out(),
.xcvr_gtrefclk01_in(eth_gty_mgt_refclk[CLK]),
.xcvr_qpll1pd_in(1'b0),
.xcvr_qpll1lock_out(),
.xcvr_qpll1clk_out(),
.xcvr_qpll1refclk_out(),
/*
* Serial data

8
src/eth/example/NT200A02/fpga/rtl/fpga_core.sv
View File

@@ -243,15 +243,7 @@ for (genvar n = 0; n < GTY_QUAD_CNT; n = n + 1) begin : gt_quad
*/
.xcvr_gtpowergood_out(eth_gty_gtpowergood[n]),
.xcvr_gtrefclk00_in(eth_gty_mgt_refclk[CLK]),
.xcvr_qpll0pd_in(1'b0),
.xcvr_qpll0lock_out(),
.xcvr_qpll0clk_out(),
.xcvr_qpll0refclk_out(),
.xcvr_gtrefclk01_in(eth_gty_mgt_refclk[CLK]),
.xcvr_qpll1pd_in(1'b0),
.xcvr_qpll1lock_out(),
.xcvr_qpll1clk_out(),
.xcvr_qpll1refclk_out(),
/*
* Serial data

8
src/eth/example/RK_XCKU5P_F/fpga/rtl/fpga_core.sv
View File

@@ -400,15 +400,7 @@ if (MAC_DATA_W == 512) begin: mac
*/
.xcvr_gtpowergood_out(qsfp_gtpowergood),
.xcvr_gtrefclk00_in(qsfp_mgt_refclk),
.xcvr_qpll0pd_in(1'b0),
.xcvr_qpll0lock_out(),
.xcvr_qpll0clk_out(),
.xcvr_qpll0refclk_out(),
.xcvr_gtrefclk01_in(qsfp_mgt_refclk),
.xcvr_qpll1pd_in(1'b0),
.xcvr_qpll1lock_out(),
.xcvr_qpll1clk_out(),
.xcvr_qpll1refclk_out(),
/*
* Serial data

8
src/eth/example/VCU108/fpga/rtl/fpga_core.sv
View File

@@ -423,15 +423,7 @@ if (MAC_DATA_W == 512) begin: mac
*/
.xcvr_gtpowergood_out(qsfp_gtpowergood),
.xcvr_gtrefclk00_in(qsfp_mgt_refclk_0),
.xcvr_qpll0pd_in(1'b0),
.xcvr_qpll0lock_out(),
.xcvr_qpll0clk_out(),
.xcvr_qpll0refclk_out(),
.xcvr_gtrefclk01_in(qsfp_mgt_refclk_0),
.xcvr_qpll1pd_in(1'b0),
.xcvr_qpll1lock_out(),
.xcvr_qpll1clk_out(),
.xcvr_qpll1refclk_out(),
/*
* Serial data

8
src/eth/example/VCU118/fpga/rtl/fpga_core.sv
View File

@@ -628,15 +628,7 @@ for (genvar n = 0; n < 2; n = n + 1) begin : gt_quad
*/
.xcvr_gtpowergood_out(qsfp_gtpowergood[n]),
.xcvr_gtrefclk00_in(qsfp1_mgt_refclk_0),
.xcvr_qpll0pd_in(1'b0),
.xcvr_qpll0lock_out(),
.xcvr_qpll0clk_out(),
.xcvr_qpll0refclk_out(),
.xcvr_gtrefclk01_in(qsfp1_mgt_refclk_0),
.xcvr_qpll1pd_in(1'b0),
.xcvr_qpll1lock_out(),
.xcvr_qpll1clk_out(),
.xcvr_qpll1refclk_out(),
/*
* Serial data

8
src/eth/example/XUPP3R/fpga/rtl/fpga_core.sv
View File

@@ -358,15 +358,7 @@ for (genvar n = 0; n < GTY_QUAD_CNT; n = n + 1) begin : gt_quad
*/
.xcvr_gtpowergood_out(eth_gty_gtpowergood[n]),
.xcvr_gtrefclk00_in(eth_gty_mgt_refclk[CLK]),
.xcvr_qpll0pd_in(1'b0),
.xcvr_qpll0lock_out(),
.xcvr_qpll0clk_out(),
.xcvr_qpll0refclk_out(),
.xcvr_gtrefclk01_in(eth_gty_mgt_refclk[CLK]),
.xcvr_qpll1pd_in(1'b0),
.xcvr_qpll1lock_out(),
.xcvr_qpll1clk_out(),
.xcvr_qpll1refclk_out(),
/*
* Serial data

8
src/eth/example/fb2CG/fpga/rtl/fpga_core.sv
View File

@@ -255,15 +255,7 @@ for (genvar n = 0; n < 2; n = n + 1) begin : gt_quad
*/
.xcvr_gtpowergood_out(qsfp_gtpowergood[n]),
.xcvr_gtrefclk00_in(qsfp_mgt_refclk[CLK]),
.xcvr_qpll0pd_in(1'b0),
.xcvr_qpll0lock_out(),
.xcvr_qpll0clk_out(),
.xcvr_qpll0refclk_out(),
.xcvr_gtrefclk01_in(qsfp_mgt_refclk[CLK]),
.xcvr_qpll1pd_in(1'b0),
.xcvr_qpll1lock_out(),
.xcvr_qpll1clk_out(),
.xcvr_qpll1refclk_out(),
/*
* Serial data

41
src/eth/rtl/us/taxi_eth_mac_100g_us.sv
View File

@@ -81,15 +81,7 @@ module taxi_eth_mac_100g_us #
*/
output wire logic xcvr_gtpowergood_out,
input wire logic xcvr_gtrefclk00_in = 1'b0,
input wire logic xcvr_qpll0pd_in = 1'b0,
output wire logic xcvr_qpll0lock_out,
output wire logic xcvr_qpll0clk_out,
output wire logic xcvr_qpll0refclk_out,
input wire logic xcvr_gtrefclk01_in = 1'b0,
input wire logic xcvr_qpll1pd_in = 1'b0,
output wire logic xcvr_qpll1lock_out,
output wire logic xcvr_qpll1clk_out,
output wire logic xcvr_qpll1refclk_out,
/*
* Serial data
@@ -329,6 +321,13 @@ ctrl_intercon_inst (
localparam STAT_TX_CNT = STAT_TX_LEVEL == 0 ? 8 : (STAT_TX_LEVEL == 1 ? 16: 32);
localparam STAT_RX_CNT = STAT_RX_LEVEL == 0 ? 8 : (STAT_RX_LEVEL == 1 ? 16: 32);
wire xcvr_qpll0lock;
wire xcvr_qpll0clk;
wire xcvr_qpll0refclk;
wire xcvr_qpll1lock;
wire xcvr_qpll1clk;
wire xcvr_qpll1refclk;
wire tx_clk_int[GT_CNT];
wire rx_clk_int[GT_CNT];
wire tx_rst_int[GT_CNT];
@@ -400,12 +399,12 @@ for (genvar n = 0; n < GT_CNT; n = n + 1) begin : ch
// drive outputs from common
assign xcvr_gtpowergood_out = ch_gtpowergood_out;
assign xcvr_qpll0lock_out = ch_qpll0lock_out;
assign xcvr_qpll0clk_out = ch_qpll0clk_out;
assign xcvr_qpll0refclk_out = ch_qpll0refclk_out;
assign xcvr_qpll1lock_out = ch_qpll1lock_out;
assign xcvr_qpll1clk_out = ch_qpll1clk_out;
assign xcvr_qpll1refclk_out = ch_qpll1refclk_out;
assign xcvr_qpll0lock = ch_qpll0lock_out;
assign xcvr_qpll0clk = ch_qpll0clk_out;
assign xcvr_qpll0refclk = ch_qpll0refclk_out;
assign xcvr_qpll1lock = ch_qpll1lock_out;
assign xcvr_qpll1clk = ch_qpll1clk_out;
assign xcvr_qpll1refclk = ch_qpll1refclk_out;
end
taxi_eth_mac_100g_us_ch #(
@@ -458,12 +457,10 @@ for (genvar n = 0; n < GT_CNT; n = n + 1) begin : ch
* PLL out
*/
.xcvr_gtrefclk00_in(xcvr_gtrefclk00_in),
.xcvr_qpll0pd_in(xcvr_qpll0pd_in),
.xcvr_qpll0lock_out(ch_qpll0lock_out),
.xcvr_qpll0clk_out(ch_qpll0clk_out),
.xcvr_qpll0refclk_out(ch_qpll0refclk_out),
.xcvr_gtrefclk01_in(xcvr_gtrefclk01_in),
.xcvr_qpll1pd_in(xcvr_qpll1pd_in),
.xcvr_qpll1lock_out(ch_qpll1lock_out),
.xcvr_qpll1clk_out(ch_qpll1clk_out),
.xcvr_qpll1refclk_out(ch_qpll1refclk_out),
@@ -471,12 +468,12 @@ for (genvar n = 0; n < GT_CNT; n = n + 1) begin : ch
/*
* PLL in
*/
.xcvr_qpll0lock_in(xcvr_qpll0lock_out),
.xcvr_qpll0clk_in(xcvr_qpll0clk_out),
.xcvr_qpll0refclk_in(xcvr_qpll0refclk_out),
.xcvr_qpll1lock_in(xcvr_qpll1lock_out),
.xcvr_qpll1clk_in(xcvr_qpll1clk_out),
.xcvr_qpll1refclk_in(xcvr_qpll1refclk_out),
.xcvr_qpll0lock_in(xcvr_qpll0lock),
.xcvr_qpll0clk_in(xcvr_qpll0clk),
.xcvr_qpll0refclk_in(xcvr_qpll0refclk),
.xcvr_qpll1lock_in(xcvr_qpll1lock),
.xcvr_qpll1clk_in(xcvr_qpll1clk),
.xcvr_qpll1refclk_in(xcvr_qpll1refclk),
/*
* Serial data

6
src/eth/rtl/us/taxi_eth_mac_100g_us_ch.sv
View File

@@ -70,12 +70,10 @@ module taxi_eth_mac_100g_us_ch #
* PLL out
*/
input wire logic xcvr_gtrefclk00_in = 1'b0,
input wire logic xcvr_qpll0pd_in = 1'b0,
output wire logic xcvr_qpll0lock_out,
output wire logic xcvr_qpll0clk_out,
output wire logic xcvr_qpll0refclk_out,
input wire logic xcvr_gtrefclk01_in = 1'b0,
input wire logic xcvr_qpll1pd_in = 1'b0,
output wire logic xcvr_qpll1lock_out,
output wire logic xcvr_qpll1clk_out,
output wire logic xcvr_qpll1refclk_out,
@@ -245,12 +243,10 @@ if (CFG_LOW_LATENCY) begin : gt
* PLL out
*/
.xcvr_gtrefclk00_in(xcvr_gtrefclk00_in),
.xcvr_qpll0pd_in(xcvr_qpll0pd_in),
.xcvr_qpll0lock_out(xcvr_qpll0lock_out),
.xcvr_qpll0clk_out(xcvr_qpll0clk_out),
.xcvr_qpll0refclk_out(xcvr_qpll0refclk_out),
.xcvr_gtrefclk01_in(xcvr_gtrefclk01_in),
.xcvr_qpll1pd_in(xcvr_qpll1pd_in),
.xcvr_qpll1lock_out(xcvr_qpll1lock_out),
.xcvr_qpll1clk_out(xcvr_qpll1clk_out),
.xcvr_qpll1refclk_out(xcvr_qpll1refclk_out),
@@ -345,12 +341,10 @@ end else if (!CFG_LOW_LATENCY) begin : gt
* PLL out
*/
.xcvr_gtrefclk00_in(xcvr_gtrefclk00_in),
.xcvr_qpll0pd_in(xcvr_qpll0pd_in),
.xcvr_qpll0lock_out(xcvr_qpll0lock_out),
.xcvr_qpll0clk_out(xcvr_qpll0clk_out),
.xcvr_qpll0refclk_out(xcvr_qpll0refclk_out),
.xcvr_gtrefclk01_in(xcvr_gtrefclk01_in),
.xcvr_qpll1pd_in(xcvr_qpll1pd_in),
.xcvr_qpll1lock_out(xcvr_qpll1lock_out),
.xcvr_qpll1clk_out(xcvr_qpll1clk_out),
.xcvr_qpll1refclk_out(xcvr_qpll1refclk_out),

2
src/eth/rtl/us/taxi_eth_mac_100g_us_gt.sv
View File

@@ -63,12 +63,10 @@ module taxi_eth_mac_100g_us_gt #
* PLL out
*/
input wire logic xcvr_gtrefclk00_in = 1'b0,
input wire logic xcvr_qpll0pd_in = 1'b0,
output wire logic xcvr_qpll0lock_out,
output wire logic xcvr_qpll0clk_out,
output wire logic xcvr_qpll0refclk_out,
input wire logic xcvr_gtrefclk01_in = 1'b0,
input wire logic xcvr_qpll1pd_in = 1'b0,
output wire logic xcvr_qpll1lock_out,
output wire logic xcvr_qpll1clk_out,
output wire logic xcvr_qpll1refclk_out,

2
src/eth/rtl/us/taxi_eth_mac_100g_us_gt_ll.sv
View File

@@ -63,12 +63,10 @@ module taxi_eth_mac_100g_us_gt_ll #
* PLL out
*/
input wire logic xcvr_gtrefclk00_in = 1'b0,
input wire logic xcvr_qpll0pd_in = 1'b0,
output wire logic xcvr_qpll0lock_out,
output wire logic xcvr_qpll0clk_out,
output wire logic xcvr_qpll0refclk_out,
input wire logic xcvr_gtrefclk01_in = 1'b0,
input wire logic xcvr_qpll1pd_in = 1'b0,
output wire logic xcvr_qpll1lock_out,
output wire logic xcvr_qpll1clk_out,
output wire logic xcvr_qpll1refclk_out,