example/VCU118: Add XFCP to VCU118 example design for monitoring and control

Signed-off-by: Alex Forencich <alex@alexforencich.com>
This commit is contained in:
Alex Forencich
2025-04-09 16:05:27 -07:00
parent a5b7b8031b
commit fee23c0bf8
6 changed files with 114 additions and 63 deletions

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@@ -4,10 +4,10 @@
This example design targets the Xilinx VCU118 FPGA board.
The design places looped-back MACs on the BASE-T and QSFP28 ports as well as a looped-back UART on on the USB UART connection.
The design places looped-back MACs on the BASE-T and QSFP28 ports, as well as XFCP on the USB UART for monitoring and control.
* USB UART
* Looped-back UART
* XFCP (921600 baud)
* RJ-45 Ethernet port with TI DP83867ISRGZ PHY
* Looped-back MAC via SGMII via Xilinx PCS/PMA core and LVDS IOSERDES
* QSFP28
@@ -35,6 +35,4 @@ Run `make` in the appropriate `fpga*` subdirectory to build the bitstream. Ensu
Run `make program` to program the board with Vivado.
To test the looped-back UART, use any serial terminal software like minicom, screen, etc. The looped-back UART will echo typed text back without modification.
To test the looped-back MAC, it is recommended to use a network tester like the Viavi T-BERD 5800 that supports basic layer 2 tests with a loopback. Do not connect the looped-back MAC to a network as the reflected packets may cause problems.