Alex Forencich
|
1f1c15ba8d
|
stats: Add max increment rate test
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-04-10 21:59:27 -07:00 |
|
Alex Forencich
|
9dcea3dd23
|
stats: Add register to store dumped value from channel to break timing path
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-04-10 21:44:55 -07:00 |
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Alex Forencich
|
8e91c26dbd
|
stats: Simplify statistics collector logic by using a shift register to track updates
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-04-10 15:16:39 -07:00 |
|
Alex Forencich
|
7128b90c1d
|
stats: Simplify zeroing in statistics collector
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-04-10 00:20:52 -07:00 |
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Alex Forencich
|
b5240ac119
|
example/ZCU111: Add XFCP to ZCU111 example design for monitoring and control
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-04-09 19:24:56 -07:00 |
|
Alex Forencich
|
665599d748
|
example/ZCU102: Add XFCP to ZCU102 example design for monitoring and control
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-04-09 19:22:16 -07:00 |
|
Alex Forencich
|
28fd0f8cba
|
example/Arty: Arty example design clean-up
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-04-09 19:12:57 -07:00 |
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Alex Forencich
|
d355956b68
|
example/KCU105: Add XFCP to KCU105 example design for monitoring and control
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-04-09 19:11:54 -07:00 |
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Alex Forencich
|
50e5dca188
|
example/VCU108: Add XFCP to VCU108 example design for monitoring and control
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-04-09 18:58:44 -07:00 |
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Alex Forencich
|
f2b5ea5c0b
|
example/HTG940: Add XFCP to HTG940 example design for monitoring and control
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-04-09 18:45:55 -07:00 |
|
Alex Forencich
|
7895a01c4f
|
example/VCU108: Fix MMCM config on VCU108
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-04-09 18:43:02 -07:00 |
|
Alex Forencich
|
71a1952dd8
|
example/KC705: Add XFCP to KC705 example design for monitoring and control
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-04-09 17:53:13 -07:00 |
|
Alex Forencich
|
e799e4e488
|
example/ZCU106: Add XFCP to ZCU106 example design for monitoring and control
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-04-09 17:43:29 -07:00 |
|
Alex Forencich
|
62ccbcd22c
|
example/KC705: Fix UART IOSTANDARD for KC705
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-04-09 17:21:49 -07:00 |
|
Alex Forencich
|
fee23c0bf8
|
example/VCU118: Add XFCP to VCU118 example design for monitoring and control
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-04-09 16:05:27 -07:00 |
|
Alex Forencich
|
a5b7b8031b
|
example/Alveo: Add XFCP to Alveo example design for monitoring and control
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-04-09 16:05:10 -07:00 |
|
Alex Forencich
|
ecfb50641d
|
axis: Fix async FIFO timing constraints when using distributed RAM
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-04-09 14:24:12 -07:00 |
|
Alex Forencich
|
04718790ae
|
example: Update 10G MAC instances in example designs
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-04-09 13:01:47 -07:00 |
|
Alex Forencich
|
93d9c8c9f6
|
eth: Add MAC statistics module to 10G MAC+PCS
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-04-09 12:18:42 -07:00 |
|
Alex Forencich
|
ddf1b37f4e
|
example/Arty: Add XFCP to Arty example design for monitoring and control
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-04-09 12:17:46 -07:00 |
|
Alex Forencich
|
abadd72b1d
|
stats: Fix naming in statistics counter module
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-04-09 10:05:41 -07:00 |
|
Alex Forencich
|
2714583a57
|
xfcp: Add XFCP statistics counter module
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-04-09 00:22:18 -07:00 |
|
Alex Forencich
|
06e9588609
|
axis: Fix parameter accesses in interface arrays
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-04-09 00:08:16 -07:00 |
|
Alex Forencich
|
c4304bf8c0
|
example: Update 1G MAC instances in example designs
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-04-08 22:12:52 -07:00 |
|
Alex Forencich
|
e90340db6e
|
eth: Add MAC statistics module to 1G MACs
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-04-08 20:22:53 -07:00 |
|
Alex Forencich
|
bb90cd5a08
|
eth: Add MAC statistics module to 10G MAC
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-04-08 20:18:43 -07:00 |
|
Alex Forencich
|
3106fd5a96
|
eth: Add MAC statistics module
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-04-08 10:49:45 -07:00 |
|
Alex Forencich
|
f920e56348
|
eth: Add frame length enforcement and additional statistics outputs to taxi_axis_baser_rx_64
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-04-07 23:37:29 -07:00 |
|
Alex Forencich
|
c69eb63a69
|
eth: Add frame length enforcement and additional statistics outputs to taxi_axis_xgmii_rx_64
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-04-07 23:29:50 -07:00 |
|
Alex Forencich
|
a53d18b9d3
|
eth: Add frame length enforcement and additional statistics outputs to taxi_axis_xgmii_rx_32
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-04-07 23:28:59 -07:00 |
|
Alex Forencich
|
cb148ee905
|
eth: Report PHY-signalled errors as framing errors instead of bad blocks
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-04-07 23:02:23 -07:00 |
|
Alex Forencich
|
f8890e4d80
|
eth: Add frame length enforcement and additional statistics outputs to taxi_axis_baser_tx_64
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-04-07 22:03:26 -07:00 |
|
Alex Forencich
|
4fd3028f77
|
eth: Add frame length enforcement and additional statistics outputs to taxi_axis_xgmii_tx_64
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-04-07 22:01:57 -07:00 |
|
Alex Forencich
|
6d31116596
|
eth: Add frame length enforcement and additional statistics outputs to taxi_axis_xgmii_tx_32
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-04-07 22:00:34 -07:00 |
|
Alex Forencich
|
07e781e186
|
eth: Improve oversize frame tests
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-04-07 17:21:36 -07:00 |
|
Alex Forencich
|
1b28dc4b9a
|
eth: Check stats outputs in AXI stream GMII RX module testbench
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-04-07 13:32:03 -07:00 |
|
Alex Forencich
|
2e05b1eff2
|
eth: Fix RX byte statistics strobe on AXIS GMII RX module
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-04-07 13:31:50 -07:00 |
|
Alex Forencich
|
b073fc8efb
|
eth: Check stats outputs in AXI stream GMII TX module testbench
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-04-07 13:25:53 -07:00 |
|
Alex Forencich
|
bc023296f4
|
eth: Do not count SFD as payload data
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-04-07 13:25:39 -07:00 |
|
Alex Forencich
|
0ef0bb3409
|
eth: Add frame length enforcement and additional statistics outputs to taxi_axis_gmii_rx
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-04-06 00:17:31 -07:00 |
|
Alex Forencich
|
5582eddfa8
|
eth: Add frame length enforcement and additional statistics outputs to taxi_axis_gmii_tx
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-04-05 22:15:39 -07:00 |
|
Alex Forencich
|
4f45ac950d
|
example/ZCU106: Add FMC pins
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-03-30 17:57:02 -07:00 |
|
Alex Forencich
|
04c62961aa
|
example/ZCU102: Add FMC pins
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-03-30 17:56:53 -07:00 |
|
Alex Forencich
|
7a53e8f33c
|
example/ZCU106: Clean up BASE-X core instances
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-03-30 17:55:59 -07:00 |
|
Alex Forencich
|
0a2e6dd573
|
example/ZCU102: Clean up BASE-X core instances
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-03-30 17:55:43 -07:00 |
|
Alex Forencich
|
a56939313a
|
example/ZCU102: Fix IOSTANDARD settings for UART pins
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-03-30 16:46:47 -07:00 |
|
Alex Forencich
|
df87998a1b
|
eth: Clean up error detection logic in combined MAC/PCS
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-03-27 09:33:56 -07:00 |
|
Alex Forencich
|
5b16933210
|
eth: Test more lengths to shift alignment
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-03-26 23:13:13 -07:00 |
|
Alex Forencich
|
bec324dc03
|
eth: Fix bugs in 10G MAC RX related to short IFGs
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-03-26 23:03:57 -07:00 |
|
Alex Forencich
|
75a3909c37
|
eth: Add default IFG setting to Ethernet MAC TX modules
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-03-26 20:13:47 -07:00 |
|