Alex Forencich
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8046a46680
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eth: Add AXI stream 32-bit XGMII Ethernet frame receiver module and testbench
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-02-07 16:25:06 -08:00 |
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Alex Forencich
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3f501aaac9
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eth: Add AXI stream GMII Ethernet frame receiver module and testbench
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-02-07 16:12:58 -08:00 |
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Alex Forencich
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584f2a6542
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eth: Add MAC pause control modules
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-02-05 21:11:14 -08:00 |
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Alex Forencich
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e35d2b2c03
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eth: Add 10G PHY module and testbench
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-02-04 17:10:21 -08:00 |
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Alex Forencich
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c6ea4071eb
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eth: Add XGMII/BASE-R encode/decode modules and testbenches
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-02-04 16:14:32 -08:00 |
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