Alex Forencich
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70c0e3d52a
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eth: Fix RX BER monitor when gearbox is enabled
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-06-15 12:54:01 -07:00 |
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Alex Forencich
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2e1619a045
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eth: Connect and tie off txsequence
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-06-15 01:20:23 -07:00 |
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Alex Forencich
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cc8ec558bf
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eth: PHY parameter clean-up, support 32-bit mode in PHY interface modules
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-06-14 22:54:09 -07:00 |
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Alex Forencich
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e993a6cfbf
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eth: Cleanup
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-06-13 19:38:06 -07:00 |
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Alex Forencich
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65eef8b5e8
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eth: Parameter cleanup
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-06-13 19:28:21 -07:00 |
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Alex Forencich
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eae4d67367
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eth: Fix testbenches
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-06-13 17:57:57 -07:00 |
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Alex Forencich
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f9041cd9d2
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eth: Fix multidriven net
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-06-13 16:51:07 -07:00 |
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Alex Forencich
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280e5129b8
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example: Build all MAC variants for ZCU106
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-06-13 16:48:22 -07:00 |
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Alex Forencich
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3349561810
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eth: Remove extraneous defaults
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-06-13 16:45:00 -07:00 |
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Alex Forencich
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741615f203
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eth: Fix parameter name
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-06-13 16:40:32 -07:00 |
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Alex Forencich
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e846e7f0cd
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eth: Add gearbox support to 64-bit 10G MAC
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-06-13 16:39:55 -07:00 |
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Alex Forencich
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28195390a2
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eth: Add GBX_CNT to taxi_xgmii_baser_enc_64 testbench
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-06-13 16:35:04 -07:00 |
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Alex Forencich
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d4acf48e0a
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eth: Fix gearbox interface in 10G PHY
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-06-13 16:34:44 -07:00 |
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Alex Forencich
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0fd4000f69
|
eth: Support both split and combined MAC/PCS in UltraScale wrapper
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-06-13 14:31:14 -07:00 |
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Alex Forencich
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886aa65522
|
eth: Add testbench for taxi_eth_mac_25g_us module
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-06-13 10:34:43 -07:00 |
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Alex Forencich
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98d06954cc
|
eth: Avoid hardcoding clock period
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-06-13 10:28:53 -07:00 |
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Alex Forencich
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4e66dd0f98
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eth: Rename gearbox start signals to sync
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-06-12 15:45:07 -07:00 |
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Alex Forencich
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ca3ee2d197
|
eth: Fix PFC/LFC parameters in 25G MAC modules
Signed-off-by: Alex Forencich <alex@alexforencich.com>
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2025-06-12 14:56:55 -07:00 |
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Alex Forencich
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a146aeaf21
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lfsr: Merge output state with data when possible
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-06-11 18:48:07 -07:00 |
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Alex Forencich
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faa914c828
|
lfsr: Merge input state with data when possible
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-06-11 18:30:31 -07:00 |
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Alex Forencich
|
a4ac9e7bb0
|
lfsr: Add PCIe scramlber sequence as a galois-mode PRBS test
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-06-11 13:06:51 -07:00 |
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Alex Forencich
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79a1438230
|
lfsr: Remove debug prints
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-06-11 13:03:10 -07:00 |
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Alex Forencich
|
f7315b7675
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lfsr: Clean up LFSR implementation
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-06-11 00:35:36 -07:00 |
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Alex Forencich
|
4e7e39828b
|
lfsr: Add tests for PCIe gen 3 scrambler
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-06-10 23:56:55 -07:00 |
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Alex Forencich
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e36ac879f7
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lfsr: Add support for non-self-synchronizing scrambler, add tests for PCIe gen 1/2 scrambler
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-06-10 23:20:42 -07:00 |
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Alex Forencich
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90780aa0b5
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lfsr: Fix alignment
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-06-10 22:41:31 -07:00 |
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Alex Forencich
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a1e24f2d7f
|
lfsr: Add input and output enable parameters to LFSR module to remove dead code
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-06-10 19:08:55 -07:00 |
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Alex Forencich
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16395bd5cd
|
lss: Fix I2C waveforms
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-06-10 16:45:27 -07:00 |
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Alex Forencich
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3ec52611eb
|
ptp: Adjust testbench thresholds
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-05-30 22:11:36 -07:00 |
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Alex Forencich
|
e4762b7a8c
|
eth: Add support for synchronous gearbox to PHY, MAC+PHY, and GT wrappers
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-05-30 21:14:54 -07:00 |
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Alex Forencich
|
f31ba113d2
|
example: Fix KCU105 TX disable pin constraints
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-05-30 18:54:45 -07:00 |
|
Alex Forencich
|
aa8f19bf3b
|
eth: Reorganize clock enable in BASE-R model
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-05-27 23:56:28 -07:00 |
|
Alex Forencich
|
9bce7f4165
|
eth: Shorten header argument name in BASE-R model
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-05-27 21:27:46 -07:00 |
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Alex Forencich
|
8a77ee9fc7
|
eth: Add reset logic, QPLL control signals, and additional configuration parameters for US/US+ GTH/GTY transceivers
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-05-21 21:06:45 -07:00 |
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Alex Forencich
|
66b53d98a2
|
Reorganize repository
Signed-off-by: Alex Forencich <alex@alexforencich.com>
|
2025-05-18 12:25:59 -07:00 |
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