Files
taxi/src/eth/example/AC701/fpga/syn/i2c.xdc
Alex Forencich 379a5f3b67 eth: Add Ethernet example design for AC701
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2026-04-13 14:59:37 -07:00

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Tcl

# SPDX-License-Identifier: MIT
#
# Copyright (c) 2014-2026 FPGA Ninja, LLC
#
# Authors:
# - Alex Forencich
#
# XDC constraints for the Xilinx AC701 board
# part: xc7a200tfbg676-2
# I2C interface
set_property -dict {LOC N18 IOSTANDARD LVCMOS33 SLEW SLOW DRIVE 8} [get_ports i2c_scl]
set_property -dict {LOC K25 IOSTANDARD LVCMOS33 SLEW SLOW DRIVE 8} [get_ports i2c_sda]
set_property -dict {LOC R17 IOSTANDARD LVCMOS33 SLEW SLOW DRIVE 8} [get_ports i2c_mux_reset]
set_false_path -to [get_ports {i2c_sda i2c_scl}]
set_output_delay 0 [get_ports {i2c_sda i2c_scl}]
set_false_path -from [get_ports {i2c_sda i2c_scl}]
set_input_delay 0 [get_ports {i2c_sda i2c_scl}]