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21 lines
665 B
Tcl
21 lines
665 B
Tcl
# SPDX-License-Identifier: MIT
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#
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# Copyright (c) 2014-2026 FPGA Ninja, LLC
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#
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# Authors:
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# - Alex Forencich
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#
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# XDC constraints for the Xilinx AC701 board
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# part: xc7a200tfbg676-2
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# I2C interface
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set_property -dict {LOC N18 IOSTANDARD LVCMOS33 SLEW SLOW DRIVE 8} [get_ports i2c_scl]
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set_property -dict {LOC K25 IOSTANDARD LVCMOS33 SLEW SLOW DRIVE 8} [get_ports i2c_sda]
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set_property -dict {LOC R17 IOSTANDARD LVCMOS33 SLEW SLOW DRIVE 8} [get_ports i2c_mux_reset]
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set_false_path -to [get_ports {i2c_sda i2c_scl}]
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set_output_delay 0 [get_ports {i2c_sda i2c_scl}]
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set_false_path -from [get_ports {i2c_sda i2c_scl}]
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set_input_delay 0 [get_ports {i2c_sda i2c_scl}]
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