Alex Forencich 64c1cb1e39 eth: Use signal sync module for internal MAC pause handling ...

Signed-off-by: Alex Forencich <alex@alexforencich.com>

2025-02-25 16:27:37 -08:00

..

taxi_axis_async_fifo.tcl

axis: Use reset synchronizer module in AXI stream async FIFO

2025-02-20 12:44:23 -08:00

taxi_eth_mac_1g_gmii.tcl

eth: Add GMII Ethernet MAC module and testbench

2025-02-16 21:37:12 -08:00

taxi_eth_mac_1g_rgmii.tcl

eth: Add RGMII Ethernet MAC module and testbench

2025-02-16 22:05:59 -08:00

taxi_eth_mac_fifo.tcl

eth: Add additional Ethernet MAC-related timing constraints

2025-02-16 22:30:15 -08:00

taxi_ptp_clock_cdc.tcl

ptp: Add timing constraints for PTP components

2025-02-16 11:29:57 -08:00

taxi_ptp_td_leaf.tcl

ptp: Add timing constraints for PTP components

2025-02-16 11:29:57 -08:00

taxi_ptp_td_rel2tod.tcl

ptp: Add timing constraints for PTP components

2025-02-16 11:29:57 -08:00

taxi_rgmii_phy_if.tcl

eth: Add RGMII PHY interface module

2025-02-16 21:50:42 -08:00

taxi_sync_reset.tcl

syn: Clean up timing constraints for reset sync

2025-02-25 15:38:39 -08:00

taxi_sync_signal.tcl

syn: Add timing constraints for signal synchronizer

2025-02-25 15:39:00 -08:00