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https://github.com/fpganinja/taxi.git
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470 lines
15 KiB
Systemverilog
470 lines
15 KiB
Systemverilog
// SPDX-License-Identifier: CERN-OHL-S-2.0
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/*
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Copyright (c) 2016-2025 FPGA Ninja, LLC
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Authors:
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- Alex Forencich
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*/
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`resetall
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`timescale 1ns / 1ps
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`default_nettype none
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/*
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* AXI4-Stream consistent overhead byte stuffing (COBS) encoder
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*/
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module taxi_axis_cobs_encode #
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(
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// append zero for in band framing
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parameter logic APPEND_ZERO = 1'b1
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)
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(
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input wire logic clk,
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input wire logic rst,
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/*
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* AXI4-Stream input (sink)
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*/
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taxi_axis_if.snk s_axis,
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/*
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* AXI4-Stream output (source)
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*/
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taxi_axis_if.src m_axis
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);
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// check configuration
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if (m_axis.DATA_W != 8 || s_axis.DATA_W != 8)
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$fatal(0, "Error: Interface DATA_W parameter mismatch (instance %m)");
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// state register
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localparam [1:0]
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INPUT_STATE_IDLE = 2'd0,
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INPUT_STATE_SEGMENT = 2'd1,
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INPUT_STATE_FINAL_ZERO = 2'd2,
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INPUT_STATE_APPEND_ZERO = 2'd3;
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logic [1:0] input_state_reg = INPUT_STATE_IDLE, input_state_next;
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localparam [0:0]
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OUTPUT_STATE_IDLE = 1'd0,
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OUTPUT_STATE_SEGMENT = 1'd1;
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logic [0:0] output_state_reg = OUTPUT_STATE_IDLE, output_state_next;
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logic [7:0] input_count_reg = 8'd0, input_count_next;
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logic [7:0] output_count_reg = 8'd0, output_count_next;
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logic fail_frame_reg = 1'b0, fail_frame_next;
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// internal datapath
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logic [7:0] m_axis_tdata_int;
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logic m_axis_tvalid_int;
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logic m_axis_tready_int_reg = 1'b0;
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logic m_axis_tlast_int;
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logic m_axis_tuser_int;
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wire m_axis_tready_int_early;
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logic s_axis_tready_mask;
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taxi_axis_if #(.DATA_W(8), .USER_EN(1), .USER_W(1)) code_fifo_in(), code_fifo_out();
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taxi_axis_if #(.DATA_W(8)) data_fifo_in(), data_fifo_out();
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assign s_axis.tready = code_fifo_in.tready && data_fifo_in.tready && s_axis_tready_mask;
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taxi_axis_fifo #(
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.DEPTH(256),
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.FRAME_FIFO(0)
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)
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code_fifo_inst (
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.clk(clk),
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.rst(rst),
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/*
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* AXI4-Stream input (sink)
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*/
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.s_axis(code_fifo_in),
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/*
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* AXI4-Stream output (source)
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*/
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.m_axis(code_fifo_out),
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/*
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* Pause
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*/
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.pause_req(),
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.pause_ack(),
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/*
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* Status
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*/
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.status_depth(),
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.status_depth_commit(),
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.status_overflow(),
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.status_bad_frame(),
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.status_good_frame()
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);
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taxi_axis_fifo #(
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.DEPTH(256),
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.FRAME_FIFO(0)
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)
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data_fifo_inst (
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.clk(clk),
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.rst(rst),
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/*
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* AXI4-Stream input (sink)
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*/
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.s_axis(data_fifo_in),
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/*
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* AXI4-Stream output (source)
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*/
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.m_axis(data_fifo_out),
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/*
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* Pause
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*/
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.pause_req(),
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.pause_ack(),
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/*
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* Status
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*/
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.status_depth(),
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.status_depth_commit(),
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.status_overflow(),
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.status_bad_frame(),
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.status_good_frame()
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);
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always_comb begin
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input_state_next = INPUT_STATE_IDLE;
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input_count_next = input_count_reg;
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fail_frame_next = fail_frame_reg;
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s_axis_tready_mask = 1'b0;
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code_fifo_in.tdata = 8'd0;
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code_fifo_in.tvalid = 1'b0;
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code_fifo_in.tlast = 1'b0;
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code_fifo_in.tuser = 1'b0;
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data_fifo_in.tdata = s_axis.tdata;
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data_fifo_in.tvalid = 1'b0;
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data_fifo_in.tlast = 1'b0;
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data_fifo_in.tuser = 1'b0;
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case (input_state_reg)
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INPUT_STATE_IDLE: begin
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// idle state
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s_axis_tready_mask = 1'b1;
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fail_frame_next = 1'b0;
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if (s_axis.tready && s_axis.tvalid) begin
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// valid input data
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if (s_axis.tdata == 8'd0 || (s_axis.tlast && s_axis.tuser)) begin
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// got a zero or propagated error, so store a zero code
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code_fifo_in.tdata = 8'd1;
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code_fifo_in.tvalid = 1'b1;
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if (s_axis.tlast) begin
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// last byte, so close out the frame
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fail_frame_next = s_axis.tuser;
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input_state_next = INPUT_STATE_FINAL_ZERO;
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end else begin
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// return to idle to await next segment
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input_state_next = INPUT_STATE_IDLE;
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end
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end else begin
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// got something other than a zero, so store it and init the segment counter
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input_count_next = 8'd2;
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data_fifo_in.tdata = s_axis.tdata;
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data_fifo_in.tvalid = 1'b1;
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if (s_axis.tlast) begin
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// last byte, so store the code and close out the frame
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code_fifo_in.tdata = 8'd2;
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code_fifo_in.tvalid = 1'b1;
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if (APPEND_ZERO) begin
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// zero frame mode, need to add a zero code to end the frame
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input_state_next = INPUT_STATE_APPEND_ZERO;
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end else begin
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// normal frame mode, close out the frame
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data_fifo_in.tlast = 1'b1;
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input_state_next = INPUT_STATE_IDLE;
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end
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end else begin
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// await more segment data
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input_state_next = INPUT_STATE_SEGMENT;
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end
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end
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end else begin
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input_state_next = INPUT_STATE_IDLE;
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end
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end
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INPUT_STATE_SEGMENT: begin
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// encode segment
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s_axis_tready_mask = 1'b1;
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fail_frame_next = 1'b0;
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if (s_axis.tready && s_axis.tvalid) begin
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// valid input data
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if (s_axis.tdata == 8'd0 || (s_axis.tlast && s_axis.tuser)) begin
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// got a zero or propagated error, so store the code
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code_fifo_in.tdata = input_count_reg;
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code_fifo_in.tvalid = 1'b1;
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if (s_axis.tlast) begin
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// last byte, so close out the frame
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fail_frame_next = s_axis.tuser;
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input_state_next = INPUT_STATE_FINAL_ZERO;
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end else begin
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// return to idle to await next segment
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input_state_next = INPUT_STATE_IDLE;
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end
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end else begin
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// got something other than a zero, so store it and increment the segment counter
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input_count_next = input_count_reg+1;
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data_fifo_in.tdata = s_axis.tdata;
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data_fifo_in.tvalid = 1'b1;
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if (input_count_reg == 8'd254) begin
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// 254 bytes in frame, so dump and reset counter
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code_fifo_in.tdata = input_count_reg+1;
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code_fifo_in.tvalid = 1'b1;
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input_count_next = 8'd1;
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end
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if (s_axis.tlast) begin
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// last byte, so store the code and close out the frame
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code_fifo_in.tdata = input_count_reg+1;
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code_fifo_in.tvalid = 1'b1;
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if (APPEND_ZERO) begin
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// zero frame mode, need to add a zero code to end the frame
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input_state_next = INPUT_STATE_APPEND_ZERO;
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end else begin
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// normal frame mode, close out the frame
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data_fifo_in.tlast = 1'b1;
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input_state_next = INPUT_STATE_IDLE;
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end
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end else begin
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// await more segment data
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input_state_next = INPUT_STATE_SEGMENT;
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end
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end
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end else begin
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input_state_next = INPUT_STATE_SEGMENT;
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end
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end
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INPUT_STATE_FINAL_ZERO: begin
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// final zero code required
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s_axis_tready_mask = 1'b0;
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if (code_fifo_in.tready) begin
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// push a zero code and close out frame
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if (fail_frame_reg) begin
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code_fifo_in.tdata = 8'd2;
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code_fifo_in.tuser = 1'b1;
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end else begin
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code_fifo_in.tdata = 8'd1;
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end
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code_fifo_in.tvalid = 1'b1;
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if (APPEND_ZERO) begin
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// zero frame mode, need to add a zero code to end the frame
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input_state_next = INPUT_STATE_APPEND_ZERO;
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end else begin
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// normal frame mode, close out the frame
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code_fifo_in.tlast = 1'b1;
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fail_frame_next = 1'b0;
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input_state_next = INPUT_STATE_IDLE;
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end
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end else begin
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input_state_next = INPUT_STATE_FINAL_ZERO;
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end
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end
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INPUT_STATE_APPEND_ZERO: begin
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// append zero for zero framing
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s_axis_tready_mask = 1'b0;
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if (code_fifo_in.tready) begin
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// push frame termination code and close out frame
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code_fifo_in.tdata = 8'd0;
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code_fifo_in.tlast = 1'b1;
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code_fifo_in.tuser = fail_frame_reg;
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code_fifo_in.tvalid = 1'b1;
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fail_frame_next = 1'b0;
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input_state_next = INPUT_STATE_IDLE;
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end else begin
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input_state_next = INPUT_STATE_APPEND_ZERO;
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end
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end
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endcase
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end
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always_comb begin
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output_state_next = OUTPUT_STATE_IDLE;
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output_count_next = output_count_reg;
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m_axis_tdata_int = 8'd0;
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m_axis_tvalid_int = 1'b0;
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m_axis_tlast_int = 1'b0;
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m_axis_tuser_int = 1'b0;
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code_fifo_out.tready = 1'b0;
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data_fifo_out.tready = 1'b0;
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case (output_state_reg)
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OUTPUT_STATE_IDLE: begin
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// idle state
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if (m_axis_tready_int_reg && code_fifo_out.tvalid) begin
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// transfer out code byte and load counter
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m_axis_tdata_int = code_fifo_out.tdata;
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m_axis_tlast_int = code_fifo_out.tlast;
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m_axis_tuser_int = code_fifo_out.tuser && code_fifo_out.tlast;
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output_count_next = code_fifo_out.tdata-1;
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m_axis_tvalid_int = 1'b1;
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code_fifo_out.tready = 1'b1;
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if (code_fifo_out.tdata == 8'd0 || code_fifo_out.tdata == 8'd1 || code_fifo_out.tuser) begin
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// frame termination and zero codes will be followed by codes
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output_state_next = OUTPUT_STATE_IDLE;
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end else begin
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// transfer out data
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output_state_next = OUTPUT_STATE_SEGMENT;
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end
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end else begin
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output_state_next = OUTPUT_STATE_IDLE;
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end
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end
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OUTPUT_STATE_SEGMENT: begin
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// segment output
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if (m_axis_tready_int_reg && data_fifo_out.tvalid) begin
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// transfer out data byte and decrement counter
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m_axis_tdata_int = data_fifo_out.tdata;
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m_axis_tlast_int = data_fifo_out.tlast;
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output_count_next = output_count_reg - 1;
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m_axis_tvalid_int = 1'b1;
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data_fifo_out.tready = 1'b1;
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if (output_count_reg == 1) begin
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// done with segment, get a code byte next
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output_state_next = OUTPUT_STATE_IDLE;
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end else begin
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// more data to transfer
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output_state_next = OUTPUT_STATE_SEGMENT;
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end
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end else begin
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output_state_next = OUTPUT_STATE_SEGMENT;
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end
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end
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endcase
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end
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always_ff @(posedge clk) begin
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input_state_reg <= input_state_next;
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output_state_reg <= output_state_next;
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input_count_reg <= input_count_next;
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output_count_reg <= output_count_next;
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fail_frame_reg <= fail_frame_next;
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if (rst) begin
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input_state_reg <= INPUT_STATE_IDLE;
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output_state_reg <= OUTPUT_STATE_IDLE;
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end
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end
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// output datapath logic
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logic [7:0] m_axis_tdata_reg = 8'd0;
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logic m_axis_tvalid_reg = 1'b0, m_axis_tvalid_next;
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logic m_axis_tlast_reg = 1'b0;
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logic m_axis_tuser_reg = 1'b0;
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logic [7:0] temp_m_axis_tdata_reg = 8'd0;
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logic temp_m_axis_tvalid_reg = 1'b0, temp_m_axis_tvalid_next;
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logic temp_m_axis_tlast_reg = 1'b0;
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logic temp_m_axis_tuser_reg = 1'b0;
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// datapath control
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logic store_axis_int_to_output;
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logic store_axis_int_to_temp;
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logic store_axis_temp_to_output;
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assign m_axis.tdata = m_axis_tdata_reg;
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assign m_axis.tkeep = 1'b1;
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assign m_axis.tstrb = m_axis.tkeep;
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assign m_axis.tvalid = m_axis_tvalid_reg;
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assign m_axis.tlast = m_axis_tlast_reg;
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assign m_axis.tid = '0;
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assign m_axis.tdest = '0;
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assign m_axis.tuser = m_axis_tuser_reg;
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// enable ready input next cycle if output is ready or the temp reg will not be filled on the next cycle (output reg empty or no input)
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assign m_axis_tready_int_early = m_axis.tready || (!temp_m_axis_tvalid_reg && (!m_axis_tvalid_reg || !m_axis_tvalid_int));
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always_comb begin
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// transfer sink ready state to source
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m_axis_tvalid_next = m_axis_tvalid_reg;
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temp_m_axis_tvalid_next = temp_m_axis_tvalid_reg;
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store_axis_int_to_output = 1'b0;
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store_axis_int_to_temp = 1'b0;
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store_axis_temp_to_output = 1'b0;
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if (m_axis_tready_int_reg) begin
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// input is ready
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if (m_axis.tready || !m_axis_tvalid_reg) begin
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// output is ready or currently not valid, transfer data to output
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m_axis_tvalid_next = m_axis_tvalid_int;
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store_axis_int_to_output = 1'b1;
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end else begin
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// output is not ready, store input in temp
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temp_m_axis_tvalid_next = m_axis_tvalid_int;
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store_axis_int_to_temp = 1'b1;
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end
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end else if (m_axis.tready) begin
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// input is not ready, but output is ready
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m_axis_tvalid_next = temp_m_axis_tvalid_reg;
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temp_m_axis_tvalid_next = 1'b0;
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store_axis_temp_to_output = 1'b1;
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end
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end
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always_ff @(posedge clk) begin
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m_axis_tvalid_reg <= m_axis_tvalid_next;
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m_axis_tready_int_reg <= m_axis_tready_int_early;
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temp_m_axis_tvalid_reg <= temp_m_axis_tvalid_next;
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// datapath
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if (store_axis_int_to_output) begin
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m_axis_tdata_reg <= m_axis_tdata_int;
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m_axis_tlast_reg <= m_axis_tlast_int;
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m_axis_tuser_reg <= m_axis_tuser_int;
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end else if (store_axis_temp_to_output) begin
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m_axis_tdata_reg <= temp_m_axis_tdata_reg;
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m_axis_tlast_reg <= temp_m_axis_tlast_reg;
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m_axis_tuser_reg <= temp_m_axis_tuser_reg;
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end
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if (store_axis_int_to_temp) begin
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temp_m_axis_tdata_reg <= m_axis_tdata_int;
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temp_m_axis_tlast_reg <= m_axis_tlast_int;
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temp_m_axis_tuser_reg <= m_axis_tuser_int;
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end
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if (rst) begin
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m_axis_tvalid_reg <= 1'b0;
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m_axis_tready_int_reg <= 1'b0;
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temp_m_axis_tvalid_reg <= 1'b0;
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end
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end
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endmodule
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`resetall
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