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17 lines
538 B
Tcl
17 lines
538 B
Tcl
# SPDX-License-Identifier: CERN-OHL-S-2.0
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#
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# Copyright (c) 2020-2025 FPGA Ninja, LLC
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#
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# Authors:
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# - Alex Forencich
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#
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# signal synchronizer timing constraints
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foreach inst [get_cells -hier -filter {(ORIG_REF_NAME == taxi_sync_signal || REF_NAME == taxi_sync_signal)}] {
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puts "Inserting timing constraints for taxi_sync_signal instance $inst"
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set_property ASYNC_REG TRUE [get_cells -hier "sync_reg_reg[*][*]" -filter "PARENT == $inst"]
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set_false_path -to [get_cells -hier "sync_reg_reg[0][*]" -filter "PARENT == $inst"]
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}
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