fileset source file ../source_efinity/efx_axi_arbiter.v is_present

fileset source file ../source_efinity/efx_axi_interconnect.v is_present

fileset source file ../source_efinity/efx_axi_pri_encoder.v is_present

fileset source file ../source_efinity/efx_axi_skid_buffer.v is_present

fileset source file ../source_efinity/efx_axi_skid_ctrl.v is_present

fileset source file ../source_efinity/efx_axi_skid_data.v is_present

fileset example file ../fpga/Ti60F225_devkit/axi_interconnect_ed.xml is_present

fileset example file ../fpga/Ti60F225_devkit/constraints.sdc is_present

fileset example file ../fpga/Ti60F225_devkit/axi_interconnect_ed.peri.xml is_present

fileset example file ../source_exp/efx_custom_master_model.v is_present

fileset example file ../source_exp/efx_custom_slave_model.v is_present

fileset example file ${IP_OUTPUT_PATH}/${IP_GEN_MODULE}/axi_interconnect.vh is_present

fileset synopsys file ../source_synopsys/efx_axi_arbiter.v is_present

fileset synopsys file ../source_synopsys/efx_axi_interconnect.v is_present

fileset synopsys file ../source_synopsys/efx_axi_pri_encoder.v is_present

fileset synopsys file ../source_synopsys/efx_axi_skid_buffer.v is_present

fileset synopsys file ../source_synopsys/efx_axi_skid_ctrl.v is_present

fileset synopsys file ../source_synopsys/efx_axi_skid_data.v is_present

fileset modelsim file ../source_modelsim/efx_axi_arbiter.v is_present

fileset modelsim file ../source_modelsim/efx_axi_interconnect.v is_present

fileset modelsim file ../source_modelsim/efx_axi_pri_encoder.v is_present

fileset modelsim file ../source_modelsim/efx_axi_skid_buffer.v is_present

fileset modelsim file ../source_modelsim/efx_axi_skid_ctrl.v is_present

fileset modelsim file ../source_modelsim/efx_axi_skid_data.v is_present

fileset ncsim file ../source_ncsim/efx_axi_interconnect.v is_present

fileset ncsim file ../source_ncsim/efx_axi_pri_encoder.v is_present

fileset ncsim file ../source_ncsim/efx_axi_skid_buffer.v is_present

fileset ncsim file ../source_ncsim/efx_axi_skid_ctrl.v is_present

fileset ncsim file ../source_ncsim/efx_axi_skid_data.v is_present

fileset aldec file ../source_aldec/efx_axi_interconnect.v is_present

fileset aldec file ../source_aldec/efx_axi_pri_encoder.v is_present

fileset aldec file ../source_aldec/efx_axi_skid_buffer.v is_present

fileset aldec file ../source_aldec/efx_axi_skid_ctrl.v is_present

fileset aldec file ../source_aldec/efx_axi_skid_data.v is_present

fileset testbench file ${IP_OUTPUT_PATH}/${IP_GEN_MODULE}/axi_interconnect.vh is_present

fileset testbench file ../source_exp/efx_custom_slave_model.v is_present

fileset testbench file ../source_exp/efx_custom_master_model.v is_present

fileset testbench file ../testbench/efx_fifo_top.ncsim.v is_present

fileset testbench file ../testbench/efx_fifo_top.vcs.v is_present

fileset testbench file ../testbench/efx_fifo_top.modelsim.v is_present