[func] add sam support for sliced llc and scu

README.md

@@ -76,15 +76,3 @@ check is performed when each middle routers receive a package. In case of a mism
 the routing monitor invokes the wrong routing path error. This component ensures that
 the routing path of the packets is maintained throughout the verification process.
 
-## Publication
-
-If you use OpenExSys in your work, you can cite us:
-
-```
-@inproceedings{fu2023cache,
-  title={Cache Coherent Framework for RISC-V Many-core Systems},
-  author={Fu, Zexin and Wang, Mingzi and Zhang, Yihai and Tan, Zhangxi},
-  booktitle={Seventh Workshop on Computer Architecture Research with RISC-V (CARRV)},
-  year={2023}
-}
-```

rtl/hn_router_sam.sv

@@ -1,7 +1,8 @@
 module hn_router_sam
   import rvh_noc_pkg::*;
 #(
-  parameter type flit_payload_t = logic[256-1:0]
+  parameter type flit_payload_t = logic[256-1:0],
+  parameter int  sliced_llc = 0
   // parameter VC_NUM_IDX_W = 1
 )
 (
@@ -22,18 +23,32 @@ assign flit_dec_o.qos_value = flit_i.qos_value;
 
 always_comb begin
   flit_o = flit_i;
+  if(sliced_llc) begin
+    flit_o.tgt_id.x_position   = flit_i.id.cid % NODE_NUM_X_DIMESION;
+    flit_o.tgt_id.y_position   = flit_i.id.cid / NODE_NUM_Y_DIMESION;
+  end else begin // when the hn is at (1,0)
     flit_o.tgt_id.x_position   = flit_i.id.cid ? (flit_i.id.cid + 1) % NODE_NUM_X_DIMESION : '0;
-  flit_o.tgt_id.y_position   = flit_i.id.cid ? (flit_i.id.cid + 1) / NODE_NUM_X_DIMESION : '0;
+    flit_o.tgt_id.y_position   = flit_i.id.cid ? (flit_i.id.cid + 1) / NODE_NUM_Y_DIMESION : '0;
+  end
   flit_o.tgt_id.device_port  = 0;
   flit_o.tgt_id.device_id    = 0;
   flit_o.src_id.x_position   = node_id_x_i;
   flit_o.src_id.y_position   = node_id_y_i;
   flit_o.src_id.device_port  = 0;
   flit_o.src_id.device_id    = 0;
+
+  flit_o.id.sid   = node_id_y_i * NODE_NUM_Y_DIMESION + node_id_x_i;
 end
 
+generate
+  if(sliced_llc) begin: gen_sliced_llc
+      assign flit_dec_o.tgt_id.x_position   = flit_i.id.cid % NODE_NUM_X_DIMESION;
+      assign flit_dec_o.tgt_id.y_position   = flit_i.id.cid / NODE_NUM_Y_DIMESION;
+  end else begin: gen_whole_llc // when the hn is at (1,0)
     assign flit_dec_o.tgt_id.x_position   = flit_i.id.cid ? (flit_i.id.cid + 1) % NODE_NUM_X_DIMESION : '0;
-assign flit_dec_o.tgt_id.y_position   = flit_i.id.cid ? (flit_i.id.cid + 1) / NODE_NUM_X_DIMESION : '0;
+    assign flit_dec_o.tgt_id.y_position   = flit_i.id.cid ? (flit_i.id.cid + 1) / NODE_NUM_Y_DIMESION : '0;
+  end
+endgenerate
 assign flit_dec_o.tgt_id.device_port  = 0;
 assign flit_dec_o.tgt_id.device_id    = 0;
 assign flit_dec_o.src_id.x_position   = node_id_x_i;

rtl/include/rvh_noc_pkg.sv

@@ -24,7 +24,18 @@
   `endif
 `endif
 
-// `define ENABLE_TXN_ID // for noc test, enable it
+`define ENABLE_TXN_ID // for noc test, enable it
+
+// ----------
+// sliced LLC
+// ----------
+// `define SLICED_LLC // make llc sliced into each tile // please define this in the compile cmd if you need it
+
+`ifdef SLICED_LLC
+  `ifndef LOCAL_PORT_NUM_2
+    `define LOCAL_PORT_NUM_2
+  `endif
+`endif
 
 // ----------
 // Single vc per input port
@@ -45,6 +56,13 @@
 // whether allow local ports in same router transfer flit, at least 2 local ports
 // ----------
 // `define ALLOW_SAME_ROUTER_L2L_TRANSFER 
+`ifdef SLICED_LLC
+  `define ALLOW_SAME_ROUTER_L2L_TRANSFER 
+`endif
+
+`ifdef LOCAL_PORT_NUM_2
+  `define ALLOW_SAME_ROUTER_L2L_TRANSFER 
+`endif
 
 // ----------
 // insert a pipeline register between local sa and global sa, for better timing
@@ -71,6 +89,7 @@
 `endif
 
 
+
 package rvh_noc_pkg;
 
 localparam  CHANNEL_NUM = 5; // 5 channels: req, resp, evict, data, snp
@@ -85,12 +104,15 @@ localparam  NodeID_Width = NodeID_X_Width + NodeID_Y_Width + NodeID_Device_Port_
 localparam  TxnID_Width = 12;
 localparam  QoS_Value_Width = 4;
 
-
-localparam  INPUT_PORT_NUMBER       = 5; // N,S,E,W,L
-localparam  INPUT_PORT_NUMBER_IDX_W = INPUT_PORT_NUMBER > 1 ? $clog2(INPUT_PORT_NUMBER) : 1;
-localparam  OUTPUT_PORT_NUMBER      = 5; // N,S,E,W,L
 localparam  ROUTER_PORT_NUMBER      = 4;
-localparam  LOCAL_PORT_NUMBER       = INPUT_PORT_NUMBER-ROUTER_PORT_NUMBER;
+`ifdef SLICED_LLC
+localparam  LOCAL_PORT_NUMBER       = 2; // at least 2 local ports, one for sliced llc
+`else
+localparam  LOCAL_PORT_NUMBER       = 1;
+`endif
+localparam  INPUT_PORT_NUMBER       = ROUTER_PORT_NUMBER + LOCAL_PORT_NUMBER; // N,S,E,W,L
+localparam  INPUT_PORT_NUMBER_IDX_W = INPUT_PORT_NUMBER > 1 ? $clog2(INPUT_PORT_NUMBER) : 1;
+localparam  OUTPUT_PORT_NUMBER      = INPUT_PORT_NUMBER; // N,S,E,W,L
 
 `ifdef COMMON_QOS_EXTRA_RT_VC
 localparam  QOS_VC_NUM_PER_INPUT   = 1;
@@ -182,7 +204,7 @@ typedef struct packed {
   // router parameters
   parameter  INPUT_PORT_NUM  = INPUT_PORT_NUMBER;
   parameter  OUTPUT_PORT_NUM = OUTPUT_PORT_NUMBER;
-  parameter  LOCAL_PORT_NUM  = INPUT_PORT_NUM-4;
+  parameter  LOCAL_PORT_NUM  = LOCAL_PORT_NUMBER;
 
 
   typedef struct packed {

rtl/rn_router_sam.sv

@@ -1,7 +1,14 @@
 module rn_router_sam
   import rvh_noc_pkg::*;
 #(
-  parameter type flit_payload_t = logic[256-1:0]
+  parameter type flit_payload_t = logic[256-1:0],
+  parameter int  sliced_llc = 0,
+  parameter int  has_addr   = 0, // for req and evict, thsy have addr and need to do sam, for resp and data, only send to the correspond hn
+  parameter int  interleave_granularity = 64, // should be (2 ** n) * 64byte, n is integer and >= 0
+  parameter int  llc_slice_num = 9,
+
+  parameter int  INTERLEAVE_BIT    = $clog2(interleave_granularity),
+  parameter int  INTERLEAVE_LENGTH = $clog2(llc_slice_num)
   // parameter VC_NUM_IDX_W = 1
 )
 (
@@ -21,21 +28,79 @@ module rn_router_sam
 assign flit_dec_o.qos_value = flit_i.qos_value;
 `endif
 
+logic [40-1:0] req_addr;
+generate
+  if(has_addr) begin
+    assign req_addr = flit_i.addr;
+  end
+endgenerate
+
+generate
+  if(sliced_llc) begin
+    if(has_addr) begin
       always_comb begin
         flit_o = flit_i;
-  flit_o.tgt_id.x_position  = 1;
+
-  flit_o.tgt_id.y_position  = 0;
+        flit_o.tgt_id.x_position  = (req_addr[INTERLEAVE_BIT+INTERLEAVE_LENGTH-1:INTERLEAVE_BIT] % llc_slice_num) % NODE_NUM_X_DIMESION;
-  flit_o.tgt_id.device_port = 0;
+        flit_o.tgt_id.y_position  = (req_addr[INTERLEAVE_BIT+INTERLEAVE_LENGTH-1:INTERLEAVE_BIT] % llc_slice_num) / NODE_NUM_Y_DIMESION;
+        flit_o.tgt_id.device_port = 1;
+
         flit_o.tgt_id.device_id   = 0;
         flit_o.src_id.x_position   = node_id_x_i;
         flit_o.src_id.y_position   = node_id_y_i;
         flit_o.src_id.device_port  = 0;
         flit_o.src_id.device_id    = 0;
       end
+    end else begin
+      always_comb begin
+        flit_o = flit_i;
       
+        flit_o.tgt_id.x_position  = flit_i.id.sid % NODE_NUM_X_DIMESION;
+        flit_o.tgt_id.y_position  = flit_i.id.sid / NODE_NUM_Y_DIMESION;
+        flit_o.tgt_id.device_port = 1;
+
+        flit_o.tgt_id.device_id   = 0;
+        flit_o.src_id.x_position   = node_id_x_i;
+        flit_o.src_id.y_position   = node_id_y_i;
+        flit_o.src_id.device_port  = 0;
+        flit_o.src_id.device_id    = 0;
+      end
+    end 
+  end else begin
+    always_comb begin
+      flit_o = flit_i;
+
+      flit_o.tgt_id.x_position  = 1;
+      flit_o.tgt_id.y_position  = 0;
+      flit_o.tgt_id.device_port = 0;    
+
+      flit_o.tgt_id.device_id   = 0;
+      flit_o.src_id.x_position   = node_id_x_i;
+      flit_o.src_id.y_position   = node_id_y_i;
+      flit_o.src_id.device_port  = 0;
+      flit_o.src_id.device_id    = 0;
+    end
+  end
+endgenerate
+
+
+generate
+  if(sliced_llc) begin: gen_sliced_llc
+    if(has_addr) begin: gen_has_addr
+      assign flit_dec_o.tgt_id.x_position  = (req_addr[INTERLEAVE_BIT+INTERLEAVE_LENGTH-1:INTERLEAVE_BIT] % llc_slice_num) % NODE_NUM_X_DIMESION;
+      assign flit_dec_o.tgt_id.y_position  = (req_addr[INTERLEAVE_BIT+INTERLEAVE_LENGTH-1:INTERLEAVE_BIT] % llc_slice_num) / NODE_NUM_Y_DIMESION;
+      assign flit_dec_o.tgt_id.device_port = 1;
+    end else begin: gen_no_addr
+      assign flit_dec_o.tgt_id.x_position   = flit_i.id.sid % NODE_NUM_X_DIMESION;
+      assign flit_dec_o.tgt_id.y_position   = flit_i.id.sid / NODE_NUM_Y_DIMESION;
+      assign flit_dec_o.tgt_id.device_port  = 1;      
+    end
+  end else begin: gen_whole_llc // when the hn is at (1,0)
     assign flit_dec_o.tgt_id.x_position   = 1;
     assign flit_dec_o.tgt_id.y_position   = 0;
     assign flit_dec_o.tgt_id.device_port  = 0;
+  end
+endgenerate
 assign flit_dec_o.tgt_id.device_id    = 0;
 assign flit_dec_o.src_id.x_position   = node_id_x_i;
 assign flit_dec_o.src_id.y_position   = node_id_y_i;

tb/flist_mesh_3x3.f

@@ -29,5 +29,3 @@ $PROJ_ROOT/$NOC_ROOT/rtl/local_port_look_adead_routing.sv
 $PROJ_ROOT/$NOC_ROOT/rtl/local_port_couple_module.sv
 $PROJ_ROOT/$NOC_ROOT/rtl/hn_router_sam.sv
 $PROJ_ROOT/$NOC_ROOT/rtl/rn_router_sam.sv
-$PROJ_ROOT/tb/ruby_testbench/rn_tile.sv
-$PROJ_ROOT/tb/ruby_testbench/hn_tile.sv