59 lines
1.7 KiB
Systemverilog
59 lines
1.7 KiB
Systemverilog
module v_receiver
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import rvh_noc_pkg::*;
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import v_noc_pkg::*;
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#(
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parameter type flit_payload_t = logic[256-1:0]
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)
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(
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// intf with dut
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// input from one of dut router's outports // N,S,E,W,L
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input logic rx_flit_pend_i,
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input logic rx_flit_v_i,
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input flit_payload_t rx_flit_i,
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input logic [VC_ID_NUM_MAX_W-1:0] rx_flit_vc_id_i,
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input io_port_t rx_flit_look_ahead_routing_i,
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// free vc credit from dut
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output logic rx_lcrd_v_o,
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output logic [VC_ID_NUM_MAX_W-1:0] rx_lcrd_id_o,
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// intf with scoreboard
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output logic check_scoreboard_vld_o,
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output receiver_info_t check_scoreboard_o,
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input logic check_scoreboard_rdy_i,
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// node id
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input node_id_t node_id_i,
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input logic clk,
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input logic rstn
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);
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flit_dec_t flit_ctrl_info;
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input_port_flit_decoder
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#(
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.flit_payload_t (flit_payload_t)
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)
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receiver_flit_decoder_u
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(
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.flit_v_i (rx_flit_v_i ),
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.flit_i (rx_flit_i ),
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.flit_look_ahead_routing_i(rx_flit_look_ahead_routing_i),
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.flit_dec_o (flit_ctrl_info )
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);
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assign check_scoreboard_vld_o = rx_flit_v_i;
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assign check_scoreboard_o.rec_id = node_id_i;
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assign check_scoreboard_o.src_id = flit_ctrl_info.src_id;
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`ifdef ENABLE_TXN_ID
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assign check_scoreboard_o.txn_id = flit_ctrl_info.txn_id;
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`endif
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assign check_scoreboard_o.flit_data = rx_flit_i[FLIT_LENGTH-1-:FLIT_DATA_LENGTH];
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assign rx_lcrd_v_o = rx_flit_v_i;
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assign rx_lcrd_id_o = rx_flit_vc_id_i;
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endmodule
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